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100[ch] 0.28[ps/ch] 200[ch] 0.54[ps/ch] TDC-calibration.

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Presentation on theme: "100[ch] 0.28[ps/ch] 200[ch] 0.54[ps/ch] TDC-calibration."— Presentation transcript:

1 100[ch] 0.28[ps/ch] 200[ch] 0.54[ps/ch] TDC-calibration

2 080813 CDH-resolution (TDC-54[ps/ch]) 21 3 4 5 6

3 PMT1 : 1852V PMT2 : 1898V PMT3 : 1767V PMT4 : 1806V Divider1 Divider2 Divider3 Divider4 ADC : ch1 ADC : ch2 ADC : ch3 ADC : ch5 PMT5 : -1600V PMT6 : -1600V Divider5 Divider6 DELAY : cable + module : 60+16 = 76 ns Discri1:10Vth Discri2:10Vth Discri3:10Vth Discri4:10Vth TDC : ch1 TDC : ch7 TDC : ch2 TDC : ch3 TDC : ch5 TDC : ch6 DELAY : cable 75 ns ADC : ch6 ADC : ch7 ADC : GATE TDC : START Discri5:140Vth Discri6:140VthDELAY : cable 75 ns GATE GENERATOR 回路図回路図 080813

4 CDH-resolution (TDC-54[ps/ch])

5 080813

6 ADC vs TOF before slewing collection 080813

7 ADC vs TOF after slewing collection 080813

8

9 TOF σ = 3.34[ch]*54[ps/ch]=180psec

10 080818 2 1 3 4 5 6 Trig

11 PMT1 : 1852V PMT2 : 1898V PMT3 : 1767V PMT4 : 1806V Divider1 Divider2 Divider3 Divider4 ADC : ch1 ADC : ch2 ADC : ch3 ADC : ch5 PMT5 : -1600V PMT6 : -1600V Divider5 Divider6 DELAY : cable + module : 60+16 = 76 ns Discri1:10Vth Discri2:10Vth Discri3:10Vth Discri4:10Vth TDC : ch1 TDC : ch7 TDC : ch2 TDC : ch3 TDC : ch5 TDC : ch6 DELAY : cable 75 ns ADC : ch6 ADC : ch7 ADC : GATE TDC : START Discri5:140Vth Discri6:140VthDELAY : cable 75 ns GATE GENERATOR 回路図回路図 Trig PMT 080818

12

13

14 ADC vs TOF before slewing collection

15 080818 ADC vs TOF after slewing collection

16 080820

17 080818 TOF σ = 2.45[ch]* 54[ps/ch]=132.3ps σ = 93.6ps

18 PMT1 : 1942V PMT2 : 1988V PMT3 : 1852V PMT4 : 1893V Divider1 Divider2 Divider3 Divider4 ADC : ch1 ADC : ch2 ADC : ch3 ADC : ch5 PMT5 : -1600V PMT6 : -1600V Divider5 Divider6 DELAY : cable + module : 60+16 = 76 ns Discri1:10Vth Discri2:10Vth Discri3:10Vth Discri4:10Vth TDC : ch1 TDC : ch7 TDC : ch2 TDC : ch3 TDC : ch5 TDC : ch6 DELAY : cable 75 ns ADC : ch6 ADC : ch7 ADC : GATE TDC : START Discri5:140Vth Discri6:140VthDELAY : cable 75 ns GATE GENERATOR 回路図回路図 Trig PMT 080820

19

20

21 ADC vs TOF before slewing collection 080820

22 ADC vs TOF after slewing collection 080820

23

24 TOF σ = 2.54[ch]* 54[ps/ch]=137.2ps σ = 97.0ps

25 080822 2 1 3 4 5 6 Trig

26 PMT1 : 1852V PMT2 : 1898V PMT3 : 1767V PMT4 : 1806V Divider1 Divider2 Divider3 Divider4 ADC : ch1 ADC : ch2 ADC : ch3 ADC : ch5 PMT5 : -1600V PMT6 : -1600V Divider5 Divider6 DELAY : cable + module : 60+16 = 76 ns Discri1:10Vth Discri2:10Vth Discri3:10Vth Discri4:10Vth TDC : ch1 TDC : ch7 TDC : ch2 TDC : ch3 TDC : ch5 TDC : ch6 DELAY : cable 75 ns ADC : ch6 ADC : ch7 ADC : GATE TDC : START Discri5:140Vth Discri6:140VthDELAY : cable 75 ns GATE GENERATOR 回路図回路図 Trig PMT 080822

27

28

29 ADC vs TOF before slewing collection 080822

30 ADC vs TOF after slewing collection 080822

31

32 TOF σ = 2.54[ch]* 54[ps/ch]=137.9ps σ = 97.5ps


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