1. Name: Guogen Liu Advisor: Prof. Chin Co-advisor: Prof. Barat Date: 07/10/2010 The deposition methods and main factors of CdTe solar cell

2. Outline: 1. Deposition methods 2. Main Factors Affecting the efficiency 3. XRD and SEM 4. Conclusion

3. 1. Deposition methods

4. 1.1. Chemical vapor deposition (CVD)

5. 1.2. Aqueous solution method (Chemical bath deposition)

6. 1.3. Sputtering

7. 1.4. Thermal evaporation 1.5. Electron beam evaporation (Physical vapor deposition)

8. CdTe Source Substrate Halogen Lamp 1.6. Closed spaced sublimation (CSS)

9. 1.7. Vapour transfer deposition (VTD)(First Solar)

10. Abound Solar’s process It is fully automated, continuous, and utilizes dry deposition

12. CTO, ZTO and CdS are deposited on substrate at RT by RF sputtering Single heat-up segment Crystallization of CTO, ZTO, and CdS, and interdiffusion occurs during the CdTe deposition step Conventional SnO 2 /CdS/CdTe device structure (requiring a thicker CdS layer) Mix “wet” and “dry” processes Several heat-up and cool- down process segments (consuming time and increasing thermal budget) NREL Deposition Processes

13. 3) HRT 5) CdTe absorber (3 to 8 μm) 2) TCO ( ~0.05 μm) (- Anode) 4) CdS window ( ~0.1 μm) 1) Glass superstrate (1000 μm) 6) Anneal with CdCl 2 7) Etch with NP or BrM 9) Back contact (+Cathode) Light 8) Anneal with Copper 2.. Main factors affecting the efficiency

14. CdTe microstructure after VCC + O 2 CdTe after NP etch + Cu:dag CdTe after thermal processing and/or stress (VCC w/o O2) CdTe microstructure after thermal processing and/or stress

15. 2.1 TCO TCO should low sheet resistance and a high transparency. In can diffuse from ITO into deposited layers. The use of a 100–200 nm thick buffer layer between ITO and CdS, such as SnO2 or ZnO, can hinder the In diffusion. The buffer layer reduces the effect of a shunt resistance coming from pinholes in the very thin CdS layer.

16. 16 2.2. CdS and buffer layer CdS thickness optimization No photocurrent generated in CdS  minimize thickness to maximize transmission to CdTe in blue region (CdS E g =2.4eV) Too-thin CdS  shunting issue F-doped CdS exhibits higher efficiency solar cells. It could passivate the grain boundaries and be more stable in 400 ℃ CdCl2 treatment. Thin resistivity buffer layer TCO/ buffer / CdS / CdTe / electrode high resistivity SnO 2, In 2 O 3, ZnO, Zn 2 SnO 4

17. 2.3.CdTe The CdTe layer should be very compact without pin-holes and voids, uniform, about 5 um thick, grain size about 3 um, (111) direction(richer in Te) Oxygen reducing pinhole density and grain size; lessens the harmful effects of decomposition of the front contact; passivate donors and defects;ensures uniform growth initiation; enhances the p-type character of CdTe.

18. 18 2.4.CdCl 2 heat treatment Methods: Soak CdTe film in CdCl 2 :MeOH, heat treat 400°C Heat treat 400°C in presence of CdCl 2 vapor Effects: CdS/CdTe interfacial mixing: CdTe y S 1-y /CdS x Te 1-x alleviates structural, electrical defects at interface Recrystalization and grain growth in CdTe Establish or increase CdTe p-type doping Passivation of grain boundary traps Chloride Used T(ºC) CdTe time (min) V oc (mV) J sc (mA/cm 2 ) FF (%)  (%) None 57015.946.94.2 CdCl 2 4102080823.869.213.3 CdCl 2 440263420.460.27.8 CdCl 2 465275524.260.211.0 ZnCl 2 4001578023.959.711.1

19. 19 2.5. back contact Approaches for non-blocking contact high work function metal or degenerate semiconductor (ex: Au, Sb 2 Te 3, graphite paste) Formation of p+ doped layer on CdTe surface to promote tunnelling thru barrier etching to produce p+ Te-rich surface layer Cu doping acts as p-type dopant in CdTe forms Cu 2 Te (in conjunction with etching) other dopants (ex: HgTe, graphite paste),

20. 2.6. Cu doping Using a three-step process to prepare Cu x Te back contact : 1. Prepare a Te-rich layer on CdTe back side by a chemical etch; 2. Deposit a thin Cu layer by electron-beam evaporation; 3. Post-anneal in N 2 or He at 200°C - 300°C for 30 minutes. Back contact TCO/CdS/CdTe Weak Junction V spv = 550 mV TCO/Buffer/CdS/Cd TeStrong Junction V spv = 800 mV Au V oc = 540 mVV oc = 815 mV Cu/Au (no anneal) V oc = 490 mVV oc = 650 mV ZnTe:N /Ni (no anneal) V oc = 540 mVV oc = 670 mV

21. 3. XRD and SEM

22. SEM images of CdTe films: a) 0% O 2 ; and b) 10% O 2. Composition of CdTe films deposited at Tso = 750 °C, Tsub = 600 °C, Pmixt = 10 Torr, using different amounts of oxygen in the gaseous atmosphere. 3.1. XRD and SEM about oxygen on grain size and composition

23. XRD of CdTe films deposited at different substrate T in 7.5 × 10–5 mbar of air. 335 ℃ 450 ℃ 500 ℃ 520 ℃ 4.2μm Scanning electron microscopy images of CdTe films deposited at different substrate temperatures and 7.5 × 10–5 mbar of air. 3.2. XRD and SEM about T sub on grain size and composition

24. Figure 3. XRD of samples.Figure 4. XRD of samples 5 and 1. (a)Te content in samples by XRF. (b) Resistivity change Te doping improves the conductivity of films greatly crystallinity of the films can be improved by appropriate Te doping. 3.3. XRD and SEM about Te doping on grain size and composition

25. SEM images of the samples: (a) pure CdTe film deposited by rf sputtering; (b) pure CSS CdTe film; (c) Te-doped CdTe film deposited by CSS. (a) is under 100 nm, (b) is about 15 μm, (c ) is about 25 μm. the electrical characteristics of Te-doped CSS CdTe films change dramatically compared to pure CdTe films. The electrical resistivity drops by several orders of magnitude, the carrier mobility increases by about 10– 100 times, andalso the carrier concentration increases by about 1000 times.

26. 1, TCO( surface and section) 2, CdS(CBD) before CdCl 2 3, CdS(CBD) after CdCl 2 TCO surface isn’t clean completely, resulting in nonuniform CdS deposition, potential adhesion problems, and poor device performance. CdS is too thick.

27. 4, CdS+CdTe before CdCl2 5, CdS+CdTe after CdCl2 Non uniform CdTe layer, grain size is too small, no P-type CdTe because of the lack of oxygen,

28. 4. Conclusion 1, Several deposition methods, including CVD, CBD, Sputtering, Thermal evaporation, PVD, CSS, VTD, 2, Main factors of efficiency, such as TCO, CdS and buffer layer, CdTe, CdCl2 heat treatment,back contact,Cu doping 3, XRD and SEM of oxygen, Temperturature of subject, Te doping on grain size and composition. SEM of Apollo sample. 4, Suggestion to Apollo sample: a, TCO surface should be clean completely b, Add a thin resistivity buffer layer between TCO and CdS c, CdS is too thick and not uniform d, Oxygen is necessary in CdTe deposition e, Vapor CdCl2 treatment is very important f, It is better to increase CdTe deposition temperture g, back contact and Cu doping can affect efficiency greatly h, Pay more attention on the interface between each layer i, CSS reactor is better

29. Thank you ?