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# Target code Generation Made by – Siddharth Rakesh 11CS30036 Date – 12/11/2013.

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Target code Generation Made by – Siddharth Rakesh 11CS30036 Date – 12/11/2013

Instruction set The format is : op dst,src Load dst, src Store dst, src Arithmetic/Logical operation: - OP dst, src1, src2 - Ex – ADD R0, R1, R2 - ADD R0, R1, M Unconditional Branch - BRN L Conditional Branch - B x L - BGTZ x L

Addressing modes: Immediate – We allow an immediate constant addressing mode. The constant is prefixed by #. Register – A memory location can be an integer indexed by a register. Indirect – We allow 2 indirect addressing modes: *r means the memory location found in the location represented by the contents of register r and *100(r) means the memory location found in the location obtained by adding 100 to the contents of r. Indexed – A location can also be an indexed address of the form a(r), where a is a variable and r is a register.

Challenges of Code Generation 1.Instruction selection Each 3 – address code statement maps to the target code. Ex – x = y + z  Load R1, y Add R1, R1, z Store x, R1 2.Register Allocation a. We have v variables, we select n variables and store them in n registers. b. Register assignment – specific register  variable x c. Optimality of target code – Metric – i. Number of memory accesses required ii. Length of instruction

Rule of assignment of cost – 1. + 1  for any instruction. 2. Additional cost of 1 for memory access. Ex – Add R0, R1, R2  Cost = 1 - Add R0, R1, M  Cost = 2 (because of memory access)

Conversion from intermediate code to m/c code Split the Intermediate code into basic blocks. Block: A sequence of code instructions executed together. Ex – a = b + c c = d + fblock goto L1  block breaks here and jumps L1: ……

Control will enter the first block with the first instruction. There should not be any jump in the middle of the block. Control can leave this block by executing the last instruction. We must identify the first instruction (leaders) of all basic blocks.

Steps to identify the leaders 1 st instruction of the 3 address code is a leader. All labels corresponding to the target statements are leaders. Statements following GOTO are leaders. A Block may thus be defined as ‘all instructions following a leader until next leader comes’.

Example : 1.loc = -1  leader 2.i = 0 3.L1 : if i < 10 goto L2  leader 4. goto L5  leader 5. t1 = 2 * I  leader 6. t2 = A[t1] 7. If t2 = x goto L3  leader 8. goto L4  leader 9.L3 : loc = i  leader 10.L4 : t3 = i + 1  leader 11. i = t3 12. goto L1 13.L5 :  leader

Flow graph The flow graph depicts the flow of control through the body of the graph. Each node will be a basic block. Arcs from a node i  j signify the transfer of control from block i to block j.

B1 B2 B8 B7 B6 B5 B4 B3 3 1,2 4 5,6,7 8 9 13 10,11,12 Line numbers corresponding to blocks Control flow graph based on previous example:

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