1. UltraSPARC

2. UltraSPARC data types
byte
halfword
word
doubleword
quadword

3. UltraSPARC
big endian
fixed length instructions (1 word / 4 bytes each)
label: opcode src, dst !comment

4. UltraSPARC registers 32 “general” purpose registers (%r0..%r31)
4 groups of 8 each:
%g0..%g7
%o0..%o7
%l0..%l7
%i0..%i7

5. UltraSPARC registers 32 “general” purpose registers (%r0..%r31)
%g0..%g7
same as %r0..%r7
globals
%g0 is always 0. It cannot be changed.
There is only one set of (shared) global registers.

6. UltraSPARC registers 32 “general” purpose registers (%r0..%r31)
%o0..%o7 (note: letter oh)
same as %r8..%r15
outs
for arguments passed to functions called by the current function
%o0 is the first arg, %o1 is the second, …
%o6 = %sp
%o7 is used for return address (do not use)

7. UltraSPARC registers 32 “general” purpose registers (%r0..%r31)
%l0..%l7 (note: letter ell)
same as %r16..%r23
locals (for function local variables)
%i6 = %fp
%i7 used for return address (do not use)

8. UltraSPARC registers 32 “general” purpose registers (%r0..%r31)
%i0..%i7
same as %r24..%r31
ins
arguments coming into this function
%i0 is the first arg, %i1 is the second, …
%i0 is also used to return value to caller

9. More registers Actually, there are many more than 32 register.
There is only one set of global registers, shared by all.
There are other sets of 16 registers ( registers).
At any time, you have a “window” into these sets.
%l0..%l7 and %i0..%i7 (%r16..%r31) are the current set.
%o0..%o7 (%r8..%r15) are the in registers from the next set.
SAVE/RESTORE instructions switch to the next/previous set.

12. Special purpose registers
%psr - processor status register
%pc - holds the address of the instruction which is currently being executed
%npc - holds the address of the instruction which is currently being fetched and which will be executed next
And many others.

13. Comments
!====================================================================== /* file: simple.s date: 6-dec-2008 author: george j. grevera, ph.d. description: example "hello world" program in sparc assembler. build: gcc -mcpu=ultrasparc -o simple.exe simple.s Note: Add -v to above to see separate assemble/link steps. run: ./simple.exe debug: mdb ./simple.exe */

14. Defining symbols and data
.file "simple.s" !symbol definitions SSIZE = 112 !minimum stack allocation size !read-only data definitions .section ".rodata" .align 8 msg: .asciz "\nhello, world!\n\n" !read-write data definitions .section ".data" val: .word 12

15. code. section ". text". align 4
!code .section ".text" .align 4 .global main main: save %sp, -SSIZE, %sp !allocate _required_ temp storage on ! stack. 96 is the minimum amount to allocate. set msg, %o0 !load address of message. ! actually a "synthetic" instruction which ! translates into two instructions below: ! sethi %hi(msg), %o0 ! or %o0, %lo(msg), %o0 call printf !call function to output the message. ! 1 out reg used as an arg. ! (in general, args may be in %o0..%o5) nop !delay instruction (actually done before call!) ! (comment this out and see what happens) ret !return from main restore !restore old set of registers (delay slot)
Code

16. Basic instructions Loads: ldsb [addr], rd !load signed byte
ldsh [addr], rd !ld signed halfword
ldub [addr], rd !ld unsigned byte
lduh [addr], rd !ld unsigned halfword
ld [addr], rd !ld word
ldd [addr], rd !ld doubleword
! rd must be even

17. Basic instructions Stores: stb rs, [addr] !store byte
sth rs, [addr] !st halfword
st rs, [addr] !st word
std rs, [addr] !st doubleword
! rs must be even

18. Basic instructions add rs, reg_or_imm, rd
addcc rs, reg_or_imm, rd !add w/ mod cc
sub rs, reg_or_imm, rd
subcc rs, reg_or_imm, rd !sub w/ mod cc

19. Basic instructions and rs, reg_or_imm, rd
andcc rs, reg_or_imm, rd !and w/ mod cc
or rs, reg_or_imm, rd
orcc rs, reg_or_imm, rd !or w/ mod cc
xor rs, reg_or_imm, rd
xorcc rs, reg_or_imm, rd !xor w/ mod cc

20. Basic instructions sdiv rs, reg_or_imm, rd !signed
smul rs, reg_or_imm, rd
udiv rs, reg_or_imm, rd !unsigned
umul rs, reg_or_imm, rd

21. Basic instructions

22. Basic instruction
nop
ret

23. Synthetic instructions
call reg_or_imm
cmp reg, reg_or_imm
dec rd
deccc rd !dec w/ mod cc
inc rd
inccc rd !inc w/ mod cc
mov reg_or_imm, rd
neg rd !2’s complement
not rd !1’s complement

24. Synthetic instructions
restore
save rs, reg_or_imm, rd
set value, rd
tst rd

25. Operand addressing modes

26. Pipeline and delay slot
Consider the following sequence of instructions:
call f
mov 52, %0
Before the first instruction of printf can be executed, the mov instruction is already in the pipeline and execution of it has started.

27. Pipeline and delay slot
Consider the following sequence of instructions:
beq someLabel
mov 52, %0
If the branch is not taken, then the instruction after beq should be executed.
If the branch is taken, then the instruction after beq should NOT be executed.
Regardless, the mov instruction is already in the pipeline and execution of it has started.

28. What should we do? Options: What’s the most efficient?
Invalidate the next instruction in the pipeline (and everything in the pipeline after the branch, or course).
Go ahead and execute the next instruction in the pipeline (the delay slot).
What’s the most efficient?

29. What should we do? Options: What’s the most efficient?
Invalidate the next instruction in the pipeline (and everything in the pipeline after the branch, or course).
Go ahead and execute the next instruction in the pipeline (the delay slot).
What’s the most efficient?

30. Pipeline and delay slot
#1 rule: You must ALWAYS fill the delay slot!
#2 rule: Only fill the delay slot w/ 1 instruction.
Consider the following sequence of instructions:
call f
call g
What must be done? (See rule #1.)

31. Pipeline and delay slot
#1 rule: You must ALWAYS fill the delay slot!
#2 rule: Only fill the delay slot w/ 1 instruction!
Consider the following sequence of instructions:
call f
nop
call g
Should we always fill the delay slot w/ NOP?

32. Pipeline and delay slot
Should we always fill the delay slot w/ NOP?
What happens if we don’t? Recall our example:
save %sp, -SSIZE, %sp !allocate _required_ temp storage on
! stack. 96 is the minimum amount to allocate.
set msg, %o0 !load address of message.
! actually a "synthetic" instruction which
! translates into two instructions below:
! sethi %hi(msg), %o0
! or %o0, %lo(msg), %o0
call printf !call function to output the message.
! 1 out reg used as an arg.
! (in general, args may be in %o0..%o5)
nop !delay instruction (actually done before call!)
! (comment this out and see what happens)
ret !return from main
restore !restore old set of registers (delay slot)
What happens if we remove this nop?

33. Pipeline and delay slot
Should we always fill the delay slot w/ NOP?
What happens if we don’t? Recall our example:
save %sp, -SSIZE, %sp !allocate _required_ temp storage on
! stack. 96 is the minimum amount to allocate.
set msg, %o0 !load address of message.
! actually a "synthetic" instruction which
! translates into two instructions below:
! sethi %hi(msg), %o0
! or %o0, %lo(msg), %o0
call printf !call function to output the message.
! 1 out reg used as an arg.
! (in general, args may be in %o0..%o5)
!nop !delay instruction (actually done before call!)
! (comment this out and see what happens)
ret !return from main
restore !restore old set of registers (delay slot)
ret fills the delay slot and is executed before printf so NOTHING is printed!

34. Pipeline and delay slot
Let’s try to fill the delay slot with something useful.
save %sp, -SSIZE, %sp !allocate _required_ temp storage on
! stack. 96 is the minimum amount to allocate.
call printf !call function to output the message.
! 1 out reg used as an arg.
! (in general, args may be in %o0..%o5)
set msg, %o0 !load address of message.
! actually a "synthetic" instruction which
! translates into two instructions below:
! sethi %hi(msg), %o0
! or %o0, %lo(msg), %o0
ret !return from main
restore !restore old set of registers (delay slot)
This is something useful. What happens now?

35. Pipeline and delay slot
Let’s try to fill the delay slot with something useful.
save %sp, -SSIZE, %sp !allocate _required_ temp storage on
! stack. 96 is the minimum amount to allocate.
call printf !call function to output the message.
! 1 out reg used as an arg.
! (in general, args may be in %o0..%o5)
set msg, %o0 !load address of message.
! actually a "synthetic" instruction which
! translates into two instructions below:
! sethi %hi(msg), %o0
! or %o0, %lo(msg), %o0
ret !return from main
restore !restore old set of registers (delay slot)
bash-3.00$ gcc simple3.s
/usr/ccs/bin/as: "simple3.s", line 38: warning: 2-word "set" pseudo-instruction in delay slot (follows CTI)

36. Pipeline and delay slot
Let’s try to fill the delay slot with something useful.
save %sp, -SSIZE, %sp !allocate _required_ temp storage on
! stack. 96 is the minimum amount to allocate.
call printf !call function to output the message.
! 1 out reg used as an arg.
! (in general, args may be in %o0..%o5)
set msg, %o0 !load address of message.
! actually a "synthetic" instruction which
! translates into two instructions below:
! sethi %hi(msg), %o0
! or %o0, %lo(msg), %o0
ret !return from main
restore !restore old set of registers (delay slot)
So what should we do – back to nop?

37. Pipeline and delay slot
Let’s try to fill the delay slot with something useful.
save %sp, -SSIZE, %sp !allocate _required_ temp storage on
! stack. 96 is the minimum amount to allocate.
call printf !call function to output the message.
! 1 out reg used as an arg.
! (in general, args may be in %o0..%o5)
set msg, %o0 !load address of message.
! actually a "synthetic" instruction which
! translates into two instructions below:
! sethi %hi(msg), %o0
! or %o0, %lo(msg), %o0
ret !return from main
restore !restore old set of registers (delay slot)
So what should we do – back to nop?

38. Pipeline and delay slot
Let’s try to fill the delay slot with something useful.
save %sp, -SSIZE, %sp !allocate _required_ temp storage on
! stack. 96 is the minimum amount to allocate.
sethi %hi(msg), %o0 !load addr of message
call printf !call function to output the message.
! 1 out reg used as an arg.
! (in general, args may be in %o0..%o5)
or %o0, %lo(msg), %o0 !delay slot – finish loading addr of message
ret !return from main
restore !restore old set of registers (delay slot)
This works well!