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DAQ/FLES Summary Walter F.J. Müller, GSI, Darmstadt CBM Collaboration Meeting 16 April 2010
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 2 Scope of Summary Joint summary of DAQ aspects of FEE/DAQ Workshop, 22/23 February at GSI DAQ/FLES Working Group this CBM week FEE/DAQ WS DAQ/FLES WG
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 3 The CBM Generic Read-out Chain Detector Front-End Board Read-Out Controller Active Buffer Board FEBROC ABB Data Combiner Board DCB First Level Event Selector FLES TNet Data Control Data & Control Sync Data Digitization Custom ASIC FEE DAQ Interface Local Pre- Processing Buffering System Synchronization DAQ FLES Interface FPGA Coprocessor Event Selection CPU Farm DAQDetector Sub-SystemFLES
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 4 Mission Statement FEE/DAQ Workshop Focus is on system aspects of the final system Interim solutions, like n-XYTER, should only be covered in a 'lessons learned from' context. FEE/DAQ WS
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 5 Agenda FEE/DAQ Workshop Monday morning: TOF(PADI/GET4 readout) afternoon:TRD/MUCH('Gas'-XYTER readout) Tuesday morning:STS('Si'-XYTER readout) afternoon:MVD/RICH DAQ/FLES Full program and presentations see http://cbm-wiki.gsi.de/cgi-bin/view/DAQ/Workshop-2010-02 http://cbm-wiki.gsi.de/cgi-bin/view/DAQ/Workshop-2010-02 FEE/DAQ WS
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 6 FLES
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 7 Options for CBM FLES Location CBM Service Building ~350m linear dist. Distance is preliminary!! 'Green Cube'
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 8 Slide: J. de Cuveland DAQ/FLES WG
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 9 Slide: J. de Cuveland DAQ/FLES WG
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 10 Slide: J. de Cuveland DAQ/FLES WG
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 11 Slide: J. de Cuveland DAQ/FLES WG
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 12 Slide: J. de Cuveland DAQ/FLES WG
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 13 Slide: J. de Cuveland DAQ/FLES WG
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DABCDABC 16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 14 InfiniBand performance tests (2006-2007) Slide: S. Linev DAQ/FLES WG
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 15 CBM Radiation Environment
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 16 STS Plane 1 (30cm) – TID FEE Aux no MUCH at FEE: ~200krad/yr at Aux: ~50krad/yr Proviso Proviso: preliminary FLUKA calculations ! FEE/DAQ WS
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 17 STS Plane 8 (100cm) – fast hadron flux FEE with MUCH 2·10 3 h/cm 2 /s 2·10 4 h/cm 2 /s 2·10 5 h/cm 2 /s at FEE: ~10 5 h/cm2/s Proviso Proviso: preliminary FLUKA calculations ! FEE/DAQ WS
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 18 Physical Location View – Feb 22 nd FEBROC/DCS ABBDCB FLES TNet Data Control Data & Control Sync Data Cu optical Data Control STS,.... TOF,...? ROC ECS on/near DetectorCBM Service Bldg.GSI/FAIR IT Bldg. Data ~50m~500m ? FEE/DAQ WS
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 19 Closer look at STS readout
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 20 STS Hit Rates per 128 Channel Chip Hit rate [MHz] Sta 0 Sta 1 Sta 2 Sta 3 Sta 4 Sta 5 Sta 6 Sta 7 Total 32-64211491000045 16-326772157116736011547 8-162083574775553254301571892698 4-849452125044096478510487535255 2-4441376512421929469310793177 1-21045100352190274 0.5-1110004006 Total133613929441136158415781920211212002 Very few chip in inner region have hit rate > 32 MHz >90% of chips have hit rates in 2...16 MHz range Hit rate per chip Statistics Au+Au @ 25 AGev 10 7 evt/sec FEE/DAQ WS SIM-Data: A. Kotynia
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 21 STS Quadrant 6 cm 5 cm STS-FEBs Is this enough space for: - 117 copper links - 10 opto converters - 10 ribbon fiber cables plus other services like - power distribution - control & monitoring -,,,,,,, size of a post card FEE/DAQ WS CAD: S. Belogurov et al
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 22 Compact electro-optics Converts I Optically enabled ASIC Use MT connector: 12 x TX or 12 x RX or 4xTX and 4xRX Optically enabled FPGA Extracted from ReflexPhotonics White Papers and Presentations Claim for 12 channels: 4 cm 2 footprint 3 mm height LightABLE from ReflexPhotonics FEE/DAQ WS
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 23 Some Data on Fiber Ribbon Cable Assume 12 fiber ribbon cable very compact, 20 mil pitch cable cross section: 2.3 x 5.1 mm Assume MPO/MPT connector 2.3 mm 5.1 mm Pictures from GORE FEE/DAQ WS
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Ulrich Brüning 24 STS Interface Converter Board Proposal for STS interfacing 2m copper twinax x1, x2, x4 or x8 copper => optical on Postcard 12.7cm x 8.9cm Conversion to optical signals with AOCs Does electrical and AOC connector fit on one Postcard ? Connector density analysis AOC connectors twinax connectors twinax connectors Passive Board Postcard miniHT connector Slide: U. Bruening FEE/DAQ WS
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 25 Proviso Proviso: link counts likely to go up to account for more background, overhead, head room,.... All STS data can be transported by ~280 ribbon cables Corresponds to 34 cm 2 cable cross section STS Link & Ribbon Cable Distribution Sta 0 Sta 1 Sta 2 Sta 3 Sta 4 Sta 5 Sta 6 Sta 7 total FEBs168176120144200 2402641512 links3614174434594254263473363214 cables/quadrant8910 9987 cables tot323640 36 3228280 FEB&Cable Statistics Au+Au @ 25 AGev 10 7 evt/sec 48 bit message FEE/DAQ WS
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 26 Where to locate fast serializers and opto-converters ?
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12 th – 16 th April, 201015 th CBM Collaboration Meeting 27 Data Aggregation on separate chip - Communication hub Motivation: Data Aggregation: In most cases 2,4, or 8 CBM-XYTER chips (FEBa2, FEBa4, FEBa8, resp.) can be aggregated to fill a 2.5 Gbps link Increase the bandwidth available per link Reduce the number of Optical Links Schemes: Embedded (aggregation integrated in CBM-XYTER) Data aggregation and Traffic Management with a separate Communication Controller Asic Communication ‘hub’ Clock Distribution Slow control traffic Data Readout traffic 6 DAQ/FLES WG Slide: P. Banerjee
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 28 All Combined – Detector & Service Bldg. Data Clock & Control CBM Service Bldg. DCB DCS on/near Detector Clock & Sync febhubopto TNet CntlNet Control Data DAQ/FLES WG
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 29 STS Quadrant – A possible arrangement 6 cm 5 cm STS-FEBs STS-'hub'STS-'opto' DAQ/FLES WG
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 30 DCS DCB DCS DCB DCS Physical Location View – April 13 th FEBABB DCB FLES Data Control Clock & Data & Control Clock & Sync Data STS,.... TOF,...? ROC ECS Cu optical on/near DetectorCBM Service Bldg.'Green Cube' Data ~50m~500m Control 'hub''opto' Data Clock & Control DCB DCS CLOSY DCS TNet CntlNet Clock & Sync Control DAQ/FLES WG
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 31 DCS Physical Location View – April 15 th FEBABB DCB FLES Data Control Clock & Data & Control Clock & Sync Data STS,.... TOF,...? ROC ECS Cu optical on/near DetectorCBM Service Bldg.'Green Cube' Data ~50m~500m Data& Control clock 'hub''opto' CLOSY DCS TNet CntlNet Clock & Sync Control DPB? DCS Clock & Data & Control DAQ/FLES WG
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 32 ROC next Gen
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33 Basic Components on FPGA Module Xilinx FPGA (Spartan, Virtex) RAM Actel Configuration Controller Flash EEPROM Voltage Regulators (1.2, 1.5,...) driven by 3.3 V or 5V RS232 Interface 1 or 2 SFPs Jitter Cleaner FMC-HPC (Vita57) connector with (160 or) 400 pins Slide: D. Gottschalk FEE/DAQ WS
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34 SysCore 3 Base Board Example 32 RJ45 Connectors with LVDS 48Volt Power Input Isolated JTAG for High Voltage Applications External Ref. Clock Inputs (LVDS??) Gigabit Links SFPs or electrically USB + GBit Ethernet Slide: D. Gottschalk FEE/DAQ WS
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 35 Controls
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13.04.2010 Burkhard Kolb GSI36 Test beam time example Burkhard Kolb GSI 36 DAQ/FLES WG Slide: B. Kolb
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13.04.2010 Burkhard Kolb GSI37Burkhard Kolb GSI 37 Requirements DB In collaboration with PANDA we have set up a database with web access http://nuclear.gla.ac.uk/CBM-DCS/ http://nuclear.gla.ac.uk/CBM-DCS/ Register Then enter requirements: Process variables Common hardware … DAQ/FLES WG Slide: B. Kolb
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16 Apr 2010 CBM Collaboration Meeting -- Walter F.J. Müller, GSI 38 The End Thanks for your attention
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