1. Threshold Logic for Nanotechnologies

2. Introductory Concepts
Threshold element or gate:
Example: y = f(x1,x2,x3) = (1,2,3,6,7) = x1’x3 + x2

3. MOBILEs
Monostable-bistable transition logic element (MOBILE): a resonant tunneling diode (RTD) and heterostructure field-effect transistor (HFET) nanotechnology based threshold element
Rising edge-triggered, current-controlled gate
Serially-connected load and driver RTDs
RTD-HFET structures in parallel to the load (driver) RTDs perform positive (negative) weighting of inputs
Area of RTDs: corresponds to weight
Difference in the areas of the driver and load RTDs: threshold

4. Majority Gates Majority gate: a special type of threshold element
A three-input majority gate: produces a 1 if a majority of its inputs are 1
M(x1,x2,x3) = x1x2 + x2x3 + x1x3
Can be implemented as a threshold element: with w1 = w2 = w3 = 1 and T = 2
Acts like an AND (OR) gate when one of its inputs is tied to 0 (1)
Nanotechnology implementations: quantum cellular automata (QCA), single-electron box (SEB)
QCA
SEB

5. Minority Gates
Minority gate: produces a 1 if a majority of its inputs are 0
m(x1,x2,x3) = x1’x2’ + x2’x3’ + x1’x3’
Acts like a NAND (NOR) gate when one of its inputs is tied to 0 (1)
Nanotechnology implementation: tunneling phase logic (TPL)
TPL

6. Capabilities and Limitations of Threshold Logic
Threshold gate: generalization of conventional gates
More powerful than conventional gates because it can realize a larger class of functions
Any conventional gate can be realized with a threshold gate
Thus, threshold gates are functionally complete
Example: NAND implementation

7. Is Every Switching Function Realizable by One Threshold Element?
Answer: No
Example: Let f(x1,x2,x3,x4) = x1x2 + x3x4
Output value must be 1: for x1x2x3’x4’, x1’x2’x3x4
Output value must be 0: for x1’x2x3’x4, x1x2’x3x4’
Since the requirements in the inequalities are conflicting, no threshold value can satisfy them
Thus, the function is not realizable by a single threshold element

8. Basic Problem of Threshold Logic
Given a switching function f(x1,x2, …,xn): determine whether it is realizable by a single threshold element, and if it is, find appropriate weights and threshold
Such a function is called a threshold function
Straightforward approach: Solve a set of 2n linear, simultaneous inequalities
Example: Let f(x1,x2,x3) = (0,1,3)
Combination 0: T must be negative
Combinations 2, 4: w2, w1 must be
negative
Combinations 3, 5: w2 must be
greater than w1
Combination 1: w3 is greater than
or equal to T
Thus, w3 T > w2 > w1
w1 = -2, w2 = -1, w3 = 1, T = -1/2

9. Sensitivity to Variations
Limitation: Due to variations in input and supply voltages, the weighted sum may deviate from its prescribed value and cause circuit malfunction
Restrictions imposed on the number of inputs and threshold T
Introduce defect tolerances: non-negative and

10. Elementary Properties
Weight-threshold vector: V = {w1,w2, …,wn;T}
Let f(x1,x2, …,xn) be realized by V1 = {w1,w2, …,wj, …,wn;T}. If xj is complemented, it can be realized by V2 = {w1,w2, …,-wj, …,wn;T-wj} with inputs x1,x2, …,xj’, …,xn
From V1:
When V2 replaces V1 and xj’ replaces xj: where g is realized by V2
g and f are identical: since the equations reduce to each other for both xj = 0 and xj = 1

11. Important Conclusions
If a function is realizable using a single threshold element, then by an appropriate choice of complemented and uncomplemented input variables: a realization with any sign distribution is possible
Corollary: if a function is realizable by a single threshold element, then it is realizable by an element with only positive weights

12. Important Property
If f(x1,x2, …,xn) is realizable by a single threshold element with V1 = {w1,w2, …,wn;T}, then its complement is realizable by a single threshold element with V2 = {-w1,-w2, …,-wn;-T}
From V1:
Multiplying both sides by -1:
Thus, f’ is realizable by V2

13. Synthesis of Threshold Networks
Unate functions: function f(x1,x2, …,xn) is positive (negative) in variable xi if there exists a disjunctive or conjunctive expression for the function in which xi only appears in uncomplemented (complemented) form
If f is either positive or negative in xj: it is said to be unate in xi
Example: f = x1x2’ + x2x3’ is positive in x1 and negative in x3, but not unate in x2
If f(x1,x2, …,xn) is unate in each of its variables: then it is called unate
Example: f = x1’x2 + x1x2x3’ is unate since it can be simplified to x1’x2 + x2x3’
Example: f = x1x2’ + x1’x2 is not unate in either variable

14. Unate Functions
If f(x1,x2, …,xn) is positive in xi: then it can be expressed as
and vice versa
If f(x1,x2, …,xn) is negative in xi: then it can be expressed as

15. Geometric Representation
n-cube: contains 2n vertices, each of which represents an assignment of values to n variables and thus corresponds to a minterm
a line is drawn between every pair of vertices which differ in just one variable
Vertices for which the function is 1 (0) called: true (false) vertices
Example: Three-cube representation for f = x’y’ + xz

16. Partial Ordering
Partial-ordering relation between vertices of the n-cube:
(a1,a2, …,an) (b1,b2, …,bn)
if and only if for all i, ai bi
Partially ordered set of vertices: a lattice
(0,0, …,0): least vertex
(1,1, …,1): greatest vertex
Some pair of variables incomparable: e.g., (0,0, …,0,1) and (1,0, …,0,0)
Without loss of generality: concentrate on positive unate functions
Example: relabel x1’x2x3’ + x2x3’x4 as x1x2x3 + x2x3x4
By reconverting the latter: possible to determine the original function

17. Unate Function Theorem
Theorem 1: f(x1,x2, …,xn) is unate if and only if it is not a tautology and the above partial ordering exists, such that for every pair of vertices, (a1,a2, …,an) and (b1,b2, …,bn), if (a1,a2, …,an) is a true vertex and
(b1,b2, …,bn) (a1,a2, …,an), then (b1,b2, …,bn) is also a true vertex of f
Minimal true vertex: A true vertex Si is said to be minimal if no other true vertex Sj < Si
Maximal false vertex: A false vertex Si is said to be maximal if no other false vertex Sj > Si
Example: For x1x2 + x3x4
Minimal true vertices: S1 = (1,1,0,0), S2 = (0,0,1,1)
Thus, every vertex greater than S1 or S2 must be a true vertex: e.g., (1,1,1,0), (0,1,1,1)
These vertices correspond to x1x2x3 and x2x3x4, which are covered by f

18. Linear Separability
For an n-cube representation for threshold functions: linear equation
w1x1 + w2x2 + … + wnxn = T
corresponds to an (n-1)-dimensional hyperplane that cuts through the n-cube
Since f = 0 when
w1x1 + w2x2 + … + wnxn < T
and f = 1 when
w1x1 + w2x2 + … + wnxn T
the hyperplane separates the true vertices from the false ones
Such a function is called a linearly separable function
Thus, every threshold function is linearly separable, and vice versa

19. Theorems Theorem 2: Every threshold function is unate
Theorem 3: Given an expression for a unate switching function, f(x1,x2, …,xn), replace xj by xk’, resulting in f(x1,x2, …,xn). If g is not a threshold function, then neither is f
Example: Let f = x1x2 + x3x4
To determine if f is a threshold function: replace x2 by x3’
This results in g = x1x3’ + x3x4
Since g is not unate in x3, it is not a threshold function
Hence, neither is f

20. Identification and Realization of Threshold Functions
Procedure:
Test the given function f for unateness
If it is unate, convert it into another function g that is positive in all its variables
Find all minimal true and maximal false vertices of g
Derive and solve a system of pq inequalities, corresponding to the p minimal true and q maximal false vertices
For minimal true vertex A = {a1,a2, …,an} and maximal false vertex B = {b1,b2, …,bn}, write
w1a1 + w2a2 + … + wnan > w1b1 + w2b2 + … + wnbn

21. Identification Example
Example: Given f = x1x2x3’x4 + x2x3’x4’
Reduce to f = x1x2x3’ + x2x3’x4’, which is unate
g = x1x2x3 + x2x3x4
Minimal true vertices: (1,1,1,0), (0,1,1,1);
Maximal false vertices: (1,1,0,1), (1,0,1,1), (0,1,1,0)
4. p = 2 and q = 3 yields 6 inequalities:
5. Necessary constraints that must be satisfied: V = {1,2,2,1; 9/2} for g
=> V = {1,2,-2,-1; 3/2} for f

22. Map-based Synthesis of Two-level Threshold Networks
Decomposition of non-threshold functions: into two or more factors that are threshold functions
Admissible pattern: a pattern of 1 cells that can be realized by a single threshold element
An admissible pattern may be in any position on the map
An admissible pattern for functions of three variables is also an admissible pattern for functions of four or more variables
Since the complement of a threshold function is also a threshold function, patterns of 0 cells are also admissible
Select a minimal number of admissible patterns such that each 1 cell is covered by at least one admissible pattern

23. Synthesis Example
Example: For f(x1,x2,x3,x4) = (2,3,6,7,10,12,14,15), find a minimal threshold-logic realization

24. Another Synthesis Example
Example: For f(x1,x2,x3,x4) = (3,5,7,10,12,14,15), find a minimal threshold-logic realization

25. Synthesis of Multi-level Threshold Networks
Example: One-to-one map from the following network to a threshold network requires seven threshold elements (including the inverter) and five logic levels – quite sub-optimal
Reason: some nodes can be collapsed into a single threshold node
Assuming a fanin restriction of four:
Collapse f = n1 + n2 to n3x5 + x6x7
Since f is not threshold: split it into n1 + x6x7, where n1 = n3x5
Since n1 + x6x7 is threshold: synthesize n1 next
Since n1 = n4x5 + n5x5 is threshold:
synthesize n4 = x1x2x3 and
n5 = x1’x4, which are both threshold

26. General Synthesis Procedure
Start with a multi-output algebraically-factored switching network G
Process each primary output of G
If the node represents a binate function, split into multiple nodes and process recursively
If the node is unate and is also a threshold function, save it in the threshold network and process its input nodes recursively
Else, split the unate node into two or more nodes that are threshold functions
Terminate procedure when all the nodes in G are mapped to threshold nodes

27. Mapping Threshold Networks to MOBILEs
MOBILE: a self-latching threshold gate because its output is valid only when the clock is high
Four-phase clocking: all signals to any threshold element must arrive in the same clock phase
Ensured by inserting buffers as necessary

28. MOBILE Example
Full-adder:

29. Synthesis of Multi-level Majority/Minority Networks
Realizable pattern: pattern of 1 cells realizable by a majority gate
For three-input positive functions: 10 realizable patterns
Removing the restriction that function be positive: 38 realizable patterns

30. Synthesis Example
Example: Consider f = x1’x2’x3’ + x1’x2x3 + x1x2x3’ + x1x2’x3
Naïve approach: decompose network into two-input AND and OR gates and replace each such gate by a reduced majority gate
However, if we make full use of the three inputs of a majority gate: only four gates necessary
Minority network: can be obtained from a majority network using De Morgan’s theorem

31. General Synthesis Procedure
Start with a multi-output algebraically-factored switching network G
Decompose G into a network in which nodes have at most three inputs
If the node represents a majority function, move on to the next node
If a common literal exists in all the product terms of the node function, factor it out and perform AND/OR mapping on it
If a common literal does not exist, check to see if the node can be implemented with fewer than four AND/OR nodes
Else, map the node onto at most four majority gates using a Karnaugh-map based procedure
Example: Consider f = x1x2’+ x2’x3
With AND/OR mapping, three majority gates are needed:
f1 = x1x2’, f2 = x2’x3, f = f1 + f2
However, since literal x2’ can be factored out: f = f1x2’ where f1 = x1+x3
This requires only two majority gates

32. K-map based Procedure
Given the map of a node function n with at most three inputs:
Find a realizable pattern f1
Find a second realizable pattern f2 based on f1 and n
Find the third realizable pattern f3 based on f1, f2 and n
Realizable patterns chosen such that n = M(f1,f2,f3) = f1f2+f2f3+f1f3
f1 may contain makeup minterms that are not minterms of n
A minterm (maxterm) of n must also be a minterm (maxterm) of at least two of the three functions, f1, f2 and f3
Enforce rule by defining two sets: and
For finding f2: if a minterm (maxterm) of n is not a minterm (maxterm) of f1, add it to ( )
For finding f3: if a minterm (maxterm) of n is not a minterm (maxterm) of both f1 and f2: add it to ( )
On failure to find f3, backtrack to find new f2

33. Synthesis Example
Example: Consider f = x1’x2’x3’ + x1’x2x3 + x1x2x3’ + x1x2’x3