1. Progress With iBOBs at Jodrell Bits & Bytes Meeting, JBO, 17-18 th Dec 2007 Jonathan Hargreaves Electronic Engineer, Jodrell Bank Observatory

2. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #2 Introduction Export – Jodrell to JIVE Import – Onsala to Jodrell iBOB introduction iBOB configured as network testing device iBOB configured as linux development board

3. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #3 Using CASPER tools with Xilinx v9.1 Simulation Models – Update gateways etc Use look under mask and change manually Use xlUpdateModel(‘modelname') Edit block_mask.m files Some Xilinx blocks have new names Xilinx Gateway In/Out -> Xilinx Gateway In/Out Block Scripts use this to find boundaries of user logic Changes to gen_xps_files.m and xps_block.m

4. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #4 Infrastructure Blocks Tengbe – the ten gigabit ports iBOB block adapted from the BEE2 version (xc2vp80) Two ports instead of four XAUI clock routing Rocket I/O & reference clock pin locations Edit system.mhs and system.ucf VSI – Interface to ZDOK connectors Added ZDOK1 to parameter options Pin locations added to BEE_hw_route.mat ADC – Interface to the ADC card 8 to 2 bit conversion done inside the block Ethlite – 100M ethernet Code slimmed down to fit in BRAM (UDP only) Incorporate into base system

5. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #5 Tool Flow Base System PPC, BRAM, UART Software to run TinySH Generate system.mhs, system.mss and system.ucf files XPS (EDK) Generate hardware bitmap Compile software Create bitfile Download via JTAG

6. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #6 iBOB = internet break-out board

7. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #7 iBOB FPGA Xilinx Virtex II Pro 2 PowerPCs 232 18x18 bit multipliers

8. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #8 iBOB SRAM 512k x 36 bits x 2 chips Double data rate

9. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #9 iBOB CX4 2 x standard 10Gbps connectors 15m on copper

10. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #10 iBOB Linux expansion card 2MB SRAM Mini SD Card

11. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #11 Network testing device: Simulink design

12. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #12 Line Rate vs. Packet Spacing

13. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #13 iBOB configured for Linux development RS232JTAG 10/100 Ethernet iBOB Configured to run Linux on one of its PowerPCs PC configured as network file server Interface to Mk Vb VLBI Receiver Local PC Update FPGA firmware over JTAG Local login over RS232 Removed when firmware is stable Memory Expansion 2MB RAM Mini SD Card

14. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #14 Conclusion Questions/Answers Contact information Dr Jonathan Hargreaves Electronic Engineer Jodrell Bank Observatory jh@jb.man.ac.uk Additional Information http://expres-eu.org/[note: only one “s”] http://www.jive.nl/ EXPReS is made possible through the support of the European Commission (DG-INFSO), Sixth Framework Programme, Contract #026642

15. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #15 Implementation Fractional Delay Filter

16. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #16 Cross Correlation Results Fractional Delay Filter

17. 17-18th Sept 2007Development of Real Time eVLBI at Jodrell Bank ObservatorySlide #17 Cross Correlation Results Fractional Delay Filter