1. Analogue to Digital Conversion © D Hoult 2010 ODWSC

2. analogue signal © D Hoult 2010 ODWS

3. The analogue signal must be sampled (its voltage must be measured at regular intervals). © D Hoult 2010 ODWS

4. The analogue signal must be sampled (its voltage must be measured at regular intervals). To measure the voltage, the A to D converter produces its own voltage which it increases in discrete steps until it is equal to the signal voltage. © D Hoult 2010 ODWS

5. The analogue signal must be sampled (its voltage must be measured at regular intervals). To measure the voltage, the A to D converter produces its own voltage which it increases in discrete steps* until it is equal to the signal voltage. * this voltage is said to be quantised © D Hoult 2010 ODWS

6. The analogue signal must be sampled (its voltage must be measured at regular intervals). At this point the counter is disabled (it stops counting). To measure the voltage, the A to D converter produces its own voltage which it increases in discrete steps until it is equal to the signal voltage. © D Hoult 2010 ODWS

7. V s is the value of the signal voltage at the instant of sampling © D Hoult 2010 ODWS

8. The sampling process is assumed to take a very short time. © D Hoult 2010 ODWS

11. The precision of the process is limited by the size of the steps © D Hoult 2010 ODWS

12. This depends on the number of bits used by the counter © D Hoult 2010 ODWS

13. 3 bit precision and sampling frequency 1 Hz © D Hoult 2010 ODWS

14. 3 bit precision and sampling frequency 1 Hz © D Hoult 2010 ODWS

15. 3 bit precision and sampling frequency 1 Hz © D Hoult 2010 ODWS

16. 3 bit precision and sampling frequency 1 Hz © D Hoult 2010 ODWS

17. 3 bit precision and sampling frequency 1 Hz © D Hoult 2010 ODWS

18. digital signal 3 bit precision and sampling frequency 1 Hz © D Hoult 2010 ODWS

19. digital signal binary coded output 3 bit precision and sampling frequency 1 Hz © D Hoult 2010 ODWS

20. digital signal binary coded output 110 110 110 etc 3 bit precision and sampling frequency 1 Hz © D Hoult 2010 ODWS

21. 3 bit precision and sampling frequency 2 Hz © D Hoult 2010 ODWS

22. 3 bit precision and sampling frequency 2 Hz © D Hoult 2010 ODWS

23. 3 bit precision and sampling frequency 2 Hz © D Hoult 2010 ODWS

24. digital signal binary coded output 3 bit precision and sampling frequency 2 Hz © D Hoult 2010 ODWS

25. digital signal binary coded output 110 001 110 001 etc 3 bit precision and sampling frequency 2 Hz © D Hoult 2010 ODWS

26. 3 bit precision and sampling frequency 4 Hz © D Hoult 2010 ODWS

27. digital signal binary coded output 110 001 110 001 etc 3 bit precision and sampling frequency 4 Hz © D Hoult 2010 ODWS

28. 4 bit precision and sampling frequency 4 Hz © D Hoult 2010 ODWS

29. 4 bit precision and sampling frequency 4 Hz © D Hoult 2010 ODWS

30. binary coded output 1011 0010 1011 0010 etc 4 bit precision and sampling frequency 4 Hz © D Hoult 2010 ODWS

31. 4 bit precision and sampling frequency 8 Hz © D Hoult 2010 ODWS

32. binary coded output 4 bit precision and sampling frequency 8 Hz © D Hoult 2010 ODWS

33. 1011 1100 1011 0110 0010 0000 0010 0110 etc 4 bit precision and sampling frequency 8 Hz © D Hoult 2010 ODWS

34. 1011 1100 1011 0110 0010 0000 0010 0110 etc Binary coded digital output corresponding to the first four samples © D Hoult 2010 ODWS

35. 1011 1100 1011 0110 0010 0000 0010 0110 etc Binary coded digital output corresponding to the first four samples © D Hoult 2010 ODWS

36. 1011 1100 1011 0110 0010 0000 0010 0110 etc Binary coded digital output corresponding to the first four samples © D Hoult 2010 ODWS

37. 1011 1100 1011 0110 0010 0000 0010 0110 etc Binary coded digital output corresponding to the first four samples © D Hoult 2010 ODWS

38. 1011 1100 1011 0110 0010 0000 0010 0110 etc Binary coded digital output corresponding to the first four samples © D Hoult 2010 ODWS

39. 1011 1100 1011 0110 0010 0000 0010 0110 etc Binary coded digital output corresponding to the first four samples In some systems, logic 1 (true) is represented by zero volts and logic zero (false) by 5 V © D Hoult 2010 ODWS

40. 1011 1100 1011 0110 0010 0000 0010 0110 etc Binary coded digital output corresponding to the first four samples In some systems, logic 1 (true) is represented by zero volts and logic zero (false) by 5 V © D Hoult 2010 ODWS