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Published byMegan Byrne Modified over 4 years ago

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**AMC1210 Quad Digital Filter – Overview, Design Tips, & Tricks**

Precision Data Converters Kevin Duke

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AMC Overview

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**Overview – What the heck does it do?**

A four channel digital filter for delta-sigma modulators Isolated current shunt & resolver applications with AMC120X Flexible filter configuration for use with ADS120X Typical Delta-Sigma ADC Block Diagram + _ Analog Input ∫ 1-Bit DAC Comparator Decimation Filter Digital Interface Serial/Parallel Bus Clocking AMC120X / ADS120X AMC1210

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**Overview – Delta Sigma Modulation**

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**Overview – A Brief Look at Modulators**

Device Name Resolution (More later...) Input Range Channels Sample Rate Reference? Isolation? ADS1201 24 Vref 1 1kSPS Int / Ext No ADS1202 16 +/- 320mV 40kSPS Internal ADS1203 ADS1204 +/- 250mV 4 ADS1205 +/- 2.5V 2 ADS1208 100mV ADS1209 AMC1203 Int Yes AMC1204 78kSPS AMC1201 ? AMC1204B 78kSPS? AMC1304 Family * Devices in red are not yet released

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**Overview – Available Collateral & EVMs**

AMC1210EVM – ‘Modular’ EVM with 4-channel ADS1204 on board & supporting circuitry. No TI software support. AMC1210MB-EVM – ‘Motherboard’ EVM with 2-channel ADS1205 on board, supporting circuitry, connectors for AMC120X/ADS120X EVMs, resolver connector & software AMC120X/ADS120X EVM – Very small DB9 connector evaluation modules featuring just the modulator and footprints for decoupling/filtering passives MATLAB & DOS Pattern Generators for the Signal Generator AMC1210 In Motor Control Applications Application Report

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**Overview – Pinout & Basic Connections**

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**Overview – Basic Resolver Circuit**

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**Overview – Basic Current Shunt Circuit**

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**Overview – Register Overview**

General Registers: Control: Pin polarity, interrupt enable, depth of pattern Pattern Generator: Shift register for pattern generator Clock Divider: Filter enable, phase calibration, signal generator control, modulator clock frequency Filter Registers: Control: Modulator clocking options, sample-and-hold Sinc Filter: Filter architecture, oversampling ratio Integrator: Bit-shift, data-format, demodulation, oversampling ratio Thresholds: High and Low thresholds used by the comparator Comparator: Flag enables, comparator structure, oversampling ratio

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**Overview – Common Applications**

Resolver / Motor Control: Isolation isn’t completely necessary, ADS120X devices fit well Filter to filter and filter to excitation synchronization is critical What’s a resolver? Considered the ‘true analog’ counter-part to ‘digital’ encoders System of 3 windings; a primary or ‘excitor’ winding and two secondary windings placed 90 degrees out of phase Current Shunts: Isolation is important, AMC120X devices fit well Digital comparator accommodates for alarm conditions common in current shunt monitors General Data-Converter: Flexible digital filter capable of fitting to a variety of applications

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AMC1210 – Design Tips

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**Design Tips – The Sinc Filter**

What is the sinc function?

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**Design Tips – The Sinc Filter**

‘Sinc Filter’ can be used in two context The idealized low-pass filter represented by the sinc function in time and a rectangular function in frequency, so dubbed ‘sinc-in-time’ The cascaded integrator-comb filter represented by a rectangular function in time and a sinc function in frequency, so dubbed ‘sinc-in-frequency’

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**Design Tips – The Sinc Filter**

Oversampling is inherently associated with the decimation structure of a CIC filter. Increasing this oversampling ratio can yield increased resolution

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**Design Tips – Calculating Bit Shift**

Only necessary for 16-bit data format as set in the integrator register, both 16 and 32 bit data formats are Binary Two’s Complement. These calculations & figures assume no integrator oversampling First, determine the possible values output by the filter unit by examining the oversampling ratio and sinc filter structure: Sinc1: - x to x Sinc2: - x2 to x2 Sinc3: - x3 to x3 Sincfast: - 2x2 to 2x2 Next, determine the number of bits required to represent those values, taking care to include the sign bit Sinc1: log2(x) + 1 Sinc1: log2(x2) + 1 Sinc1: log2(x3) + 1 Sincfast: log2(2x2) + 1 Finally, apply integer truncation and the appropriate rounding then subtract 16 to calculate the shifts required

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**Design Tips – Calculating Bit Shift**

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**Design Tips – Calculating Bit Shift**

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**Design Tips – Calculating Bit Shift**

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**Design Tips – Calculating Bit Shift**

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**Design Tips – Calculating Bit Shift**

Should additional filtering be applied by the integrator, the filter parameters must be included in the previous calculations

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**Design Tips – Calculating LSB Weight**

Almost the same as any other data-converter Vref/(2(bits-1) -1) Where bits is precisely the number of bits of data recovered from the device If this is greater than 16, the value should be truncated to 16 bits If this is less than 16, the value may be fractional even though fractional bits cannot exist

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**Design Tips – Calculating Data Rate**

Calculating data-rate from the AMC1210 is straight forward, but not explicit in the datasheet The frequency data will be produced from the sinc filter can be expressed as: FData_Sinc = FModulator / SOSR Similarly, the frequency data will be produced from the integrator filter (if active) can be expressed as: FData_Integrator = FData_Sinc / IOSR The data rate equation can be simplified to: FData = FModulator /( SOSR * IOSR ) Sinc1, Sinc2, Sinc3, and Sincfast architectures each take the same amount of time to produce data

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**Design Tips – Resolver Applications**

Resolver applications have specific timing requirements related to the filter parameters that must be met A typical resolver application synchronizes the frequency of the carrier signal with the frequency of the motor control loop, usually between 8- 20kHz The carrier signal frequency can be defined by: A data converter in a resolver application typically produces a conversion result once per cycle of the carrier signal

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**Design Tips – AMC1210MB-EVM Example**

Resolvers come with frequency specifications related to the filtering behavior of the resolver coils Our resolver on hand required a relatively high frequency carrier: 16kHz Sharing a 32MHz clock source for the AMC1210 and the ADS1205 sets the ADS1205 near it’s maximum bit-rate of 16.5MHz and is an easy frequency to start from to achieve a 16kHz carrier fCLK = 32MHz NCDIV = 2 NPAT = 1000 SOSR = 125 IOSR = 8 N = 2

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AMC1210 – Design Tricks

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**Design Tricks – Resolver Apps**

Synchronicity is absolutely key for a successful resolver application A synchronous sinc filter enable is possible MFE bit in the Clock Divider Register Individual filter enable bits in each Sinc Filter register Resolver applications, however, also require utilizing the integrator filter The integrator filter becomes active and starts integrating as soon as it is enabled and it sees clocks from the modulator There is no synchronous reset for the integrator filters Solution: Stop the system clocks for the AMC1210 and ADS1205 until we are ready to convert Issue a reset between acquisition blocks before writing registers

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**Design Tricks – Resolver Apps**

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**Design Tricks – Resolver Apps**

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**Design Tricks – Resolver Apps**

Just behind synchronization in importance is minimizing zero crossing error during phase calibration Phase calibration has a small chance to fail if the signal that phase calibration is performed against is too weak in magnitude Solution: Collect a brief burst of data on both sine and cosine components, then perform phase calibration on whichever signal is farthest from ground (positive or negative) Monitor for failure during phase calibration with some time-out case, should it fail reset the AMC1210 and re-iterate through the initialization process The good news is...once the device is up and running the position data is reliable and exhibits no phase inversion issues!

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**Design Tricks – Resolver Apps**

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**Design Tricks – Resolver Apps**

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**Remaining Items of Curiosity...**

For any further questions don’t hesitate to make a forum post! e2e.ti.com/support/data_converters/precision_data_converters/default.aspx

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