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Published byChristian Freeman Modified over 6 years ago

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**Lecture 3 Operational Amplifiers—Non-ideal behavior**

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**Goals Study non-ideal op amp behavior.**

Demonstrate circuit analysis techniques for non-ideal op amps. Understand frequency response limitations of op amp circuits. 2

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**Difference Amplifier Assume an ideal op-amp**

vi2 = 0 v+ = 0 = v-, vo(1) = -R2.vi1 (inverting amplifier) R1 Vi1 = 0 V+ = R4. vi2, vo(2) = (1+ R2/R1) . R4.vi2 R3 + R R3+R4 non-inverting amplifier vo = vo(1) + vo(2) = (1+ R2). R4 vi R2.Vi1 R1 R3 + R R1 Assume an ideal op-amp Use the superposition theory

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**Difference Amplifiers**

In order to provide equal gain for both inputs vo = -R2/R1 (v1 – v2) (1 + R2 ) . R = R2 R1 R3 + R R1 R4/R3 = R2/R Balance Condition

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**Difference Amplifier For R2= R1**

Also called a differential subtractor, amplifies difference between input signals. Rin2 is series combination of R1 and R2 because i+ is zero. For v2=0, Rin1= R1, as the circuit reduces to an inverting amplifier. For general case, i1 is a function of both v1 and v2. 5

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**Difference Amplifier Define vo = Ad vid + Acmvicm**

vid = v1 – v2 differential input voltage vicm = (v1 + v2)/ Common-mode input voltage vicm, and vid are another representation for the inputs vo = Ad vid Acmvicm Differential gain Common-mode gain For the ideal case, vo = -R2/R1(v1 – v2) = (-R2/R1).vid + 0 Ad = -R2/R1, and Acm = 0 If balance condition is not satisfied, (R4/R3≠ R2/R1) Then Acm ≠ 0

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**Difference Amplifier FOM**

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**Integrator Since ic= is**

Voltage at the circuit’s output at time t is given by the initial capacitor voltage integral of the input signal from start of integration interval, here, t=0. Integration of an input step signal results in a ramp at the output. Feedback resistor R2 in the inverting amplifier is replaced by capacitor C. The circuit uses frequency-dependent feedback. 8

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**Differentiator Since iR= is**

Input resistor R1 in the inverting amplifier is replaced by capacitor C. Derivative operation emphasizes high-frequency components of input signal, hence is less often used than the integrator. Output is scaled version of derivative of input voltage. 9

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**Operational Amplifier Complete Model**

Represented by: A= open-circuit voltage gain vid = (v+-v-) = differential input signal voltage Rid = amplifier input resistance Ro = amplifier output resistance 3

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**Non-ideal Operational Amplifier**

Various error terms arise in practical operational amplifiers due to non-ideal behavior. Some of the non-ideal characteristics include: √ Finite open-loop gain that causes gain error Nonzero output resistance Finite input resistance Finite CMRR Common-mode input resistance √ DC error sources √ Output voltage and current limits 11

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**Finite Open-loop Gain vo = A (v+ - v-) = A.vin |v+ - v- | > 0 V-**

+VS V- - V Vin = V+ - V- o S V- V+ i + V+ - A V + in -VS vo = A (v+ - v-) = A.vin |v+ - v- | > 0 Example 1, Inverting Amplifier 12

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**DC Error Sources: Input-Offset Voltage**

vo=A(v+-v-), if v+ = v- Then vo = 0 (Ideal case) For real op-amp an input dc offset exists that can saturates the output. We can bring the output back to zero by applying an external voltage equal in magnitude but opposite in direction to the offset voltage 14

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**Finding the error in the output voltage produced by the offset (vos)**

Consider only the offset voltage. i.e set any input signal to zero Voe = output error due to vos If an input signal is connected to R1 Total output = FOR LF351, vos = 5mV (typical) Desired output error 15

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**DC Error Sources: Input-Offset Voltage (Example)**

Output voltage is given by Actual sign of VOS is unknown as only upper bound is given. Note: Offset voltage of most IC op amps can be manually adjusted by adding a potentiometer as shown. Problem: Find quiescent dc voltage at output. Given data: R1 =1.2 kW, R2 = 99 kW, Assumptions: Ideal op amp except for nonzero offset voltage. 16

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**DC Error Sources: Input-Bias and Offset Currents**

Bias currents IB1 and IB2 ( base currents in BJTs or gate currents in MOSFETs or JFETs) are similar in value with directions depending on internal amplifier circuit type + - IB Ios/2 IB2 IB1 Ideal -opamp Equivalent circuit model Sign of offset current is unknown as only upper bound is given. 17

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**DC Error Sources: Input-Bias and Offset Currents**

In inverting amplifier shown, IB1 shorted out by ground connection. Since,inverting input is at virtual ground, amplifier output is forced to supply IB2 through R2 . i1 Set vin=0, v- = v+ = 0 (virtual gnd) i1=0, i2=IB2 This poses a limitation on the value of R2 18

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Numerical Example 19

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**DC Error Sources: Input-Bias and Offset Currents - Bias Current Compensation**

By superposition, if Since, offset current is typically 5.10 times smaller than individual bias currents, dc output voltage error can be reduced by using bias compensation. Bias current compensation resistor RB is used in series with non-inverting input. Output due to IB1 alone is 20

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**DC Error Sources: Input-Bias and Offset Currents - Errors in Integrator**

At t=0, reset switch is opened, circuit starts integrating its own offset voltage and bias current. Using superposition analysis, Output becomes ramp with slope determined by VOS and IB2 and saturates at one of the power supplies. At t<0, reset switch is closed, circuit becomes a voltage-follower, 21

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