1. Polling and Interrupts
ECE 447: Lecture 7
Polling and Interrupts

2. ECE 447: Polling Main Program Polling routine . Cycle continuously
Signal from
device #1?
Service
device #1
Signal from
device #2?
Service
device #2
Signal from
device #N?
Service
device #N
Cycle
continuously

3. ECE 447: Interrupt

4. ECE 447: External Edge Sensitive Interrupts
Pin
Event / Interrupt
STRA - Strobe A Interrupt
PA0 - Input Capture 3 (IC3)
PA1 - Input Capture 2 (IC2)
PA2 - Input Capture 1 (IC1)
PA3 - Input Capture 4/ Output compare 5
(IC4/OC5)
PA7 - Pulse Accumulator Input (PAI)

5. ECE 447: External Level Sensitive Interrupts
Pin
Event / Interrupt
IRQ - maskable interrupt, may be
ignored by setting a bit in a
“mask” register.
XIRQ - non-maskable interrupt, can
not be ignored, no “mask”
register available.
Non-Maskable Interrupts are usually reserved for critical events (i.e. unrecoverable errors)

6. ECE 447: Interrupt Service Routines

7. ECE 447: Interrupt Vectors

8. ECE 447: Interrupt Vector Jump Table

9. ECE 447: Register Structure of 68HC11A 7 B
Accumulators A and B or D
Double Accumulator D 15
X-index register IX 15
Y-index register IY 15 SP
Stack Pointer 15 PC
Program Counter 15
Condition Code Register 7
CCR
S X H I N Z V C

10. ECE 447: Condition Code Register
CCR
S X H I N Z V C
carry / borrow
overflow
zero
negative
I-interrupt mask
half-carry (from bit 3)
X-interrupt mask
stop disable

11. ECE 447: Setting and Clearing Interrupt Masks
I - interrupt mask
set
cleared
interrupt disabled
interrupt enabled
1. by RESET
2. whenever an interrupt occurs
3. using SEI
4. using TAP
1. by RTI
2. using CLI
3. using TAP
X - interrupt mask
set
cleared
interrupt disabled
interrupt enabled
1. by RESET
2. whenever an interrupt occurs
1. by RTI
2. using TAP

12. ECE 447: Condition Code Instructions
1. set a flag  flag
SE [C, V, I]
2. clear a flag 0  flag
CL [C, V, I]
3. change all flags A  CC
TAP
4. read all flags CC  A
TPA

13. ECE 447: 68HC11 Interrupts Timer input capture 3 Timer input capture 2
CC Register
Mask
0 - interrupt
enabled
1 - interrupt
disabled
Local Enable
Flag
1 - interrupt
enabled
0 - interrupt
disabled
Interrupt
Source
Vector
Address
Jump Table
Address
Timer input capture 3
Timer input capture 2
Timer input capture 1
Real-time interrupt
IRQ (external pin) +
STRA
XIRQ
Software interrupt
Illegal opcode trap
COP failure
Clock monitor fail
FFEA-EB
FFEC-ED
FFEE-EF
FFF0-F1
FFF2-F3
FFF4-F5
FFF6-F7
FFF8-F9
FFFA-FB
FFFC-FF
00E2-00E4
00E5-00E7
00E8-00EA
00EB-00ED
00EE-00F0
00F1-00F3
00F4-00F6
00F7-00F9
00FA-00FC
00FD-00FF I X NA
TMSK1,IC3I
TMSK1,IC2I
TMSK1,IC1I
TMSK2, RTII —
PIOC, STAI
CONFIG, NOCOP
OPTION,CME

14. ECE 447: 68HC11 Interrupts Pulse accumulator input edge overflow
CC Register
Mask
0 - interrupt
enabled
1 - interrupt
disabled
Local Enable
Flag
1 - interrupt
enabled
0 - interrupt
disabled
Interrupt
Source
Vector
Address
Jump Table
Address
Pulse accumulator
input edge
overflow
Timer overflow
Timer input capture 4/
output compare 5
Timer output compare 4
Timer output compare 3
Timer output compare 2
Timer output compare 1
FFDA-DB
FFDC-DD
FFDE-DF
FFE0-E1
FFE2-E3
FFE4-E5
FFE6-E7
FFE8-E9
00CA-00CC
00CD-00CF
00D0-00D2
00D3-00D5
00D6-00D8
00D9-00DB
00DC-00DE
00DF-00E1 I
TMSK2,PAII
TMSK2,PAOVI
TMSK2,TOI
TMSK1,I4/O5I
TMSK1,OC4I
TMSK1,OC3I
TMSK1,OC2I
TMSK1,OC1I

15. ECE 447: 68HC11 Interrupts Reserved SCI Serial System
CC Register
Mask
0 - interrupt
enabled
1 - interrupt
disabled
Local Enable
Flag
1 - interrupt
enabled
0 - interrupt
disabled
Interrupt
Source
Vector
Address
Jump Table
Address
Reserved
SCI Serial System
receive data register
full
receiver overrun
transmit data register
empty
transmit complete
idle line detected
SPI serial transfer
complete
FFC0-D5
FFD6-D7
FFD8-D9 —
00C4-00C6
00C7-00C9 — I —
SCCR2,RIE
SCCR2,TIE
SCCR2,TCIE
SCCR2,ILIE
SPCR, SPIE

16. ECE 447: Port C & CL PC7-PC0 PORTC PORTCL STRA
Reading PORTC reads data currently present on input lines
Reading PORTCL reads data latched in the input register using
a falling or rising edge of STRA
PORTC - unsychronized input
PORTCL - synchronized input

17. ECE 447: When a Strobe Occurs
PC7:PC0
DATA1
DATA2
STRA
PIOC, EGA
DATA2
read
DATA1
read
PIOC, STAF
PIOC, STAI
interrupt
STAF is reset by a two-step process:
1) read PIOC
2) read PORTCL

18. ECE 447: Polling for STRA #include <hc11e9.h>
while (!PIOC & STAF);
a = PORTCL;

19. ECE 447: Interrupt Service Routine for STRA
STRA interrupt has the same Vector Address
and the same Jump Table Address as IRQ
Interrupt service routine should contain checking
for a source of the interrupt
Example:
#include <hc11e9.h>
#define STAF_STAI (STAF | STAI)
if (PIOC & STAF_STAI == STAF_STAI)
{ STRA routine }
else
{ IRQ routine }