1. The University of Adelaide, School of Computer Science
21 March 2020
Chapter 2
Instructions: Language of the Computer
Chapter 2 — Instructions: Language of the Computer

2. Automatic and static data
C has two storage classes: automatic and static.
Automatic variables are local to a procedure and are discarded when the procedure exits.
Static variables exist across exits from and entries to procedures.
Static data in global pointer or GP (X27).
what is preserved across a procedure call: 2

3. Allocating Space for New Data on the Stack
Procedure frame or activation record
The segment of the stack containing a procedure’s saved registers and local variables
State of the stack before, during, and after the procedure call: 3

4. The University of Adelaide, School of Computer Science
21 March 2020
Memory Layout
Text: program code
Static data: global variables
e.g., static variables in C, constant arrays and strings
Dynamic data: heap
E.g., malloc in C, new in Java
Stack: automatic storage 4
Chapter 2 — Instructions: Language of the Computer

5. The University of Adelaide, School of Computer Science
21 March 2020
Character Data
Byte-encoded character sets
ASCII: 128 characters
95 graphic, 33 control
Latin-1: 256 characters
ASCII, +96 more graphic characters 5
Chapter 2 — Instructions: Language of the Computer

6. Character Data Unicode: 32-bit character set
Used in Java, C++ wide characters, …
Most of the world’s alphabets, plus symbols
UTF-8, UTF-16: variable-length encodings 6

7. Byte/Halfword Operations
The University of Adelaide, School of Computer Science
21 March 2020
Byte/Halfword Operations
LEGv8 byte/halfword load/store
Load byte:
LDURB Rt, [Rn, offset]
Sign extend to 32 bits in rt
Store byte:
STURB Rt, [Rn, offset]
Store just rightmost byte
Load halfword:
LDURH Rt, [Rn, offset]
Store halfword:
STURH Rt, [Rn, offset]
Store just rightmost halfword 7
Chapter 2 — Instructions: Language of the Computer

8. The University of Adelaide, School of Computer Science
21 March 2020
String Copy Example
C code:
Null-terminated string
void strcpy (char x[], char y[]) { size_t i; i = 0; while ((x[i]=y[i])!='\0') i += 1; } 8
Chapter 2 — Instructions: Language of the Computer

9. The University of Adelaide, School of Computer Science
21 March 2020
String Copy Example
LEGv8 code:
strcpy: SUBI SP,SP,#8 // adjust stack for 1 more item
STUR X19,[SP,#0] // push X19 ADD X19,XZR,XZR // i= L1: ADD X10,X19,X1 // X10 = addr of y[i] LDURB X11,[X10,#0] // X11 = y[i] ADD X12,X19,X0 // X12 = addr of x[i] STURB X11,[X12,#0] // x[i] = y[i] CBZ X11,L2 // if y[i] == 0 then exit ADDI X19,X19,#1 // i = i + 1 B L1 // next iteration of loop L2: LDUR X19,[SP,#0] // restore saved $s0 ADDI SP,SP,8 // pop 1 item from stack BR LR // and return 9
Chapter 2 — Instructions: Language of the Computer

10. 32-bit Constants – Wide immediates and addresses
The University of Adelaide, School of Computer Science
21 March 2020
Most constants are small
12-bit immediate is sufficient
For the occasional 32-bit constant
MOVZ: move wide with zeros
MOVK: move wide with keep
Use with flexible second operand (shift)
MOVZ X9,255,LSL 16
MOVK X9,255,LSL 0 10
Chapter 2 — Instructions: Language of the Computer

11. Example
What is the LEGv8 assembly code to load this 64-bit constant into register X19?
MOVZ X19, 61, LSL 16 //61 decimal= binary
MOVK X19, 2304, LSL 0 // 2304 decimal = 11

12. The University of Adelaide, School of Computer Science
21 March 2020
Branch Addressing
B-type
B 1000 // go to location 10000ten
CB-type
CBNZ X19, Exit // go to Exit if X19 != 0
Both addresses are PC-relative
Address = PC + offset (from instruction)
PC-relative addressing refers to the number of words to the next instruction instead of the number of bytes to stretch the distance of branch, e.g. 19-bit field addresses ±1 MB from the current PC 5
10000ten
6 bits
26 bits
181
Exit 19
8 bits
19 bits
5 bits 12
Chapter 2 — Instructions: Language of the Computer

13. Example: Branch offset
C code:
while (save[i] == k) i += 1;
Compiled LEGv8 code:
Loop: LSL X10,X22,#3 // Temp reg X10 = i * ADD X10,X10,X25 // X10 = address of save[i] LDUR X9,[X10,#0] // Temp reg X9 = save[i] SUB X11,X9,X24 // X11 = save[i] − k CBNZ X11,Exit // go to Exit if save[i] ≠ k(X11 ≠ 0)
ADDI X22,X22,#1 // i = i B Loop // go to Loop Exit: …
80000 – starting location
Machine code −6 13

14. Branching Far Away
Given a branch on register X19 being equal to register zero,
CBZ X19, L1
replace it by a pair of instructions that offers a much greater branching distance.
These instructions replace the short-address conditional branch:
CBNZ X19, L2
B L1
L2: 14

15. LEGv8 Addressing Mode Summary15

16. Decoding Machine Language
LEGv8 encoding of the opcodes for the LEGv8 machine language 16

17. Decoding Machine code
What is the assembly language statement corresponding to the machine instruction 8b0f001?
Instruction in binary:
Determine the instruction format
First need to find the opcode field.
opcode varies from 6 bits to 11 bits depending on the format.
Since opcodes must be unique, one way to identify them is to see how many 11-bit opcodes do the shorter opcodes correspond.
For example, the branch instruction B use a 6-bit opcode with the value:
Measured in 11-bit opcodes, it occupies all the opcode values from to
That is, if any 11-bit opcode had a value in that range, such as it would conflict with the 6-bit opcode of branch. 17

18. LEGv8 Encoding Summary
Tentative opcode field (11 bits) is then , which is 1112 corresponds to ADD in R format shown in table
Parse the binary format into fields in R format and decode the rest of the instruction by looking at the field values
opcode Rm shamt Rn Rd
ADD X16,X15,X5 18

19. The University of Adelaide, School of Computer Science
21 March 2020
Synchronization
Two processors sharing an area of memory
P1 writes, then P2 reads
Data race if P1 and P2 don’t synchronize
Result depends on order of accesses
Hardware support required
Atomic read/write memory operation
No other access to the location allowed between the read and write
Synchronization primitive – lock, 0: free and 1: unavailable
A processor sets the lock by doing an exchange of 1 with the memory address corresponding to the lock.
§2.11 Parallelism and Instructions: Synchronization 19
Chapter 2 — Instructions: Language of the Computer

20. Synchronization in LEGv8
The University of Adelaide, School of Computer Science
21 March 2020
Synchronization in LEGv8
Could be a single instruction
E.g., atomic swap of register ↔ memory
Or an atomic pair of instructions
Load exclusive register: LDXR
Store exclusive register: STXR
To use:
Execute LDXR then STXR with same address
If there is an intervening change to the address, store fails (communicated with additional output register)
Only use register instruction in between
STXR specifies three registers: one to hold the address, one to indicate whether the atomic operation failed or succeeded, and one to hold the value to be stored in memory if it succeeded. 20
Chapter 2 — Instructions: Language of the Computer

21. Synchronization in LEGv8
Example 1: atomic swap (to test/set lock variable)
again: LDXR X10,[X20,#0]
STXR X23,X9,[X20] // X9 = status
CBNZ X9, again
ADD X23,XZR,X10 // X23 = loaded value
Example 2: lock
ADDI X11,XZR,#1 // copy locked value
again: LDXR X10,[X20,#0] // read lock
CBNZ X10, again // check if it is 0 yet
STXR X11, X9, [X20] // attempt to store
BNEZ X9,again // branch if store fails
Unlock:
STUR XZR, [X20,#0] // free lock by writing 0 21

22. Translation and Startup
The University of Adelaide, School of Computer Science
21 March 2020
Translation and Startup
Many compilers produce object modules directly
§2.12 Translating and Starting a Program
Static linking
UNIX follows a suffix convention for files: C source files are named x.c, assembly files are x.s, object files are named x.o, statically linked library routines are x.a, dynamically linked library routes are x.so, and executable files by default are called a.out. MS-DOS uses the suffixes .C, .ASM, .OBJ, .LIB, .DLL, and .EXE to the same effect. 22
Chapter 2 — Instructions: Language of the Computer

23. Assembler Pseudoinstruction
A common variation of assembly language instructions often treated as if it were an instruction in its own right.
LEGv8 assembler accepts the following instruction even though it is not found in the LEGv8 machine language:
MOV X9,X10 // register X9 gets register X10
The assembler converts this into the machine language:
ORR X9,XZR,X10 // register X9 gets 0 OR register X10
The LEGv8 assembler also converts CMP (compare) into a subtract instruction that sets the condition codes and has XZR as the destination.
CMP X9,X10 // compare X9 to X10 and set condition codes
SUBS XZR,X9,X10 // use X9 − X10 to set condition codes 23

24. Assembler
LEGv8 assemblers use hexadecimal in addition to binary and decimal
The assembler turns the assembly language program into an object file
combination of machine language instructions, data, and information needed to place instructions properly in memory.
To produce the binary version of each instruction the assembler must determine the addresses corresponding to all labels.
Symbol table keeps track of labels used in branches and data transfer instructions. 24

25. Producing an Object Module
The University of Adelaide, School of Computer Science
Producing an Object Module
21 March 2020
Assembler (or compiler) translates program into machine instructions
The object file for UNIX systems typically contains six distinct pieces:
Header: describes the size and position of the other pieces of the object file
Text segment: contains the machine language code
Static data segment: data allocated for the life of the program
Relocation info: identifies instructions and data words that depend on absolute addresses when the program is loaded into memory
Symbol table: global definitions and external references
Debug info: concise description of how the modules were compiled for debugger to associate machine instructions with C source files and to make data structures readable. 25
Chapter 2 — Instructions: Language of the Computer