1. Chapter 15 Differential Amplifiers and Operational Amplifier Design
Microelectronic Circuit Design
Richard C. Jaeger
Travis N. Blalock
Microelectronic Circuit Design, 3E
McGraw-Hill

2. Two-stage Prototype of an Op Amp
For higher gain, pnp C-E amplifier is connected at output of the input stage differential amplifier.
Virtual ground at emitter node allows input stage to achieve full inverting amplifier gain without needing emitter bypass capacitor.
PNP transistor permits direct coupling between stages, allows emitter of pnp to be connected to ac ground and provides required voltage level shift to bring output back to zero.
Bypass and coupling capacitors are thus eliminated.
Differential amplifier provides desired differential input,CMRR and ground referenced output as the input stage of op amp.
Microelectronic Circuit Design, 3E
McGraw-Hill

3. Two-stage Op Amp: DC Analysis
This circuit requires a resistance in series with emitter of Q3 to stabilize Q-point (as collector current of Q3 is exponentially dependent on base-emitter voltage), at the expense of voltage gain loss.
From dc equivalent circuit, IE1= IE2 = I1 /2. If base current of Q3 is neglected and C-B current gains are one,
As both inputs are zero, output also=0
IS3 is saturation current. For zero offset voltage
Microelectronic Circuit Design, 3E
McGraw-Hill

4. Two-stage Op Amp: AC Analysis (Differential Mode)
Half-circuit can be constructed from ac equivalent circuit in spite of asymmetry, as voltage variations at collector of Q2 don’t substantially alter transistor current in forward-active operation region.
From small-signal circuit model,
Microelectronic Circuit Design, 3E
McGraw-Hill

5. Two-stage Op Amp: AC Analysis (Differential Mode cont.)
This can be rewritten as
Base current of Q3 is neglected so, IC2RC=VBE3=0.7 V, IC3R=VEE,
Upper limit onIC2 and I1 is set by maximum dc bias current at input, lower limit on IC3 is set by minimum current to drive total load impedance at output.
Microelectronic Circuit Design, 3E
McGraw-Hill

6. Two-stage Op Amp: AC Analysis (Common Mode)
From ac equivalent circuit for common-mode inputs,
For differential-mode inputs, collector current was
Thus,
From ac equivalent circuit, we observe that circuitry beyond collector of Q2 is same as that in differential mode half-circuit. The difference in collector currents causes difference in output voltage.
Microelectronic Circuit Design, 3E
McGraw-Hill

7. Improving Op Amp Voltage Gain
Overall amplifier gain decreases rapidly as the quiescent current of second stage decreases. Voltage gain can improve if resistor in second stage is replaced by current source with R2 >> ro3, if R2 is neglected,
This expression can be reduced to
Because of the high output resistance the amplifier resembles a transconductance amplifier more than a true low output resistance voltage amplifier.
Microelectronic Circuit Design, 3E
McGraw-Hill

8. Reducing Output Resistance
From ac equivalent circuit,
A C-C stage is added to the prototype to maintain voltage gain but reduce output resistance.
Microelectronic Circuit Design, 3E
McGraw-Hill

9. Three-Stage Bipolar Op Amp Analysis
Problem: Find differential-mode gain, CMRR, input and output resistances.
Given data: VCC=VEE=15 V, bo1 = bo2 = bo3 = bo4 =100, VA3 =75V, I1 = 100 mA, I2 = 500 mA, I3 = 5 mA, R1 = 750 kW , RL = 2 kW, R2 and R3 are infinite.
Analysis:
Voltage at node 3 is one base-emitter voltage drop above zero. VEC3=15-0.7=14.3 V.
Jaeger/Blalock
7/28/07
Microelectronic Circuit Design, 3E
McGraw-Hill

10. Three-Stage Bipolar Op Amp Analysis (cont.)
Overall gain is lower because of lower gain of first stage (since rp3 << RC) and lower gain than expected for second stage (as reflected loading of RL is of same order as ro3).
Microelectronic Circuit Design, 3E
McGraw-Hill