1. Dynamic Scheduling Physical Register File ready bits Issue Queue (IQ)
ECE 721, Spring 2019
Prof. Eric Rotenberg

2. Physical Register File ready bits
One ready bit per physical register
Location in pipeline
NOT located with Physical Register File
Physically located in the Schedule Stage, close to Issue Queue
ECE 721, Spring 2019
Prof. Eric Rotenberg

3. Physical Register File ready bits
If I am the producer of a physical register:
Dispatch: Clear ready bit of my physical destination reg.
Issue: Set ready bit of my physical destination reg.
If I am the consumer of a physical register:
Dispatch: Read ready bit of my physical source register to initialize my source operand’s ready bit in Issue Queue
If initially “ready”, it means the value is in the PRF (producer has executed) or will be by the time the consumer issues (producer has at least issued)
If initially “not-ready”, it means the producer has not yet issued, therefore, consumer must wait in Issue Queue until woken up by producer
ECE 721, Spring 2019
Prof. Eric Rotenberg

4. Issue Queue (IQ) This is the dynamic scheduling unit
Contains renamed instructions that have been dispatched but not yet issued
Same as “reservation stations” but no data for source operands, just tags. Tags are the physical register names (e.g., p99).
ECE 721, Spring 2019
Prof. Eric Rotenberg

5. IQ: contents and high-level operation
IQ CAM (wakeup array)
IQ RAM (payload)
ready bit
ready bit
source tag
source tag
dest. tag
misc. instr. information 1
p10 1
p99 … …
issue 1 … …
p99
p99
Note: also set ready bit of p99 in the PRF ready bit array
ECE 721, Spring 2019
Prof. Eric Rotenberg