1. ASIC PMm2 Digital part
Frédéric DULUCQ
08/02/2008

2. Frederic DULUCQ - dulucq@lal.in2p3.fr
Working Overview
08/02/2008
Frederic DULUCQ -

3. Frederic DULUCQ - dulucq@lal.in2p3.fr
General Info
16 independent channels
SCA depth of 2 for time and charge measurement
SCA management like FIFO
Timestamp 24b 10 MHz (1.67s)
40 MHz clock for ADC + SCA management
10 MHz clock for Timestamp + Readout
08/02/2008
Frederic DULUCQ -

4. Top Level block diagram
08/02/2008
Frederic DULUCQ -

5. Acquisition : FIFO management
08/02/2008
Frederic DULUCQ -

6. Acquisition : Track & Hold Cell
08/02/2008
Frederic DULUCQ -

7. Frederic DULUCQ - dulucq@lal.in2p3.fr
Conversion module
SPIROC conversion module with some updates
Conversion clock : 40 MHz
Resolution 12 bits for time and charge
16 Charges and 16 Times converted in 1 ADC run
Max conversion time : 103 us
08/02/2008
Frederic DULUCQ -

8. Frederic DULUCQ - dulucq@lal.in2p3.fr
Selective Read Out
Only hit channels are readout
Readout clock : 10 MHz
Max Readout time (16 chn hit) : 100 us
52 bits of data / hit channel (all gray)
Readout format (MSB first) :
(MSB) 4 bits channel # + 24 bits timestamp
12 bits charge + 12 bits time (LSB)
08/02/2008
Frederic DULUCQ -

9. Frederic DULUCQ - dulucq@lal.in2p3.fr
Layout of digital part
AMS 0.35µm SiGe
3 Power supply rings :
vdd : 10 µm
gnd : 10 µm
vsub : 3 µm
Area : 1800 x 1000 µm
137 I/Os
1152 Ram Registers (about 75% of digital part)
Post layout simulation in progress
08/02/2008
Frederic DULUCQ -

10. Frederic DULUCQ - dulucq@lal.in2p3.fr
I/O to external system
Type
Name
Function IN
ClkAcqt
40 MHz clock
ClkTS
10 MHz clock
Rstb
Global reset (active low)
RazExtCmptTSb
External reset of Timestamp counter (active low)
StartSyst
Start system : acqt, conv, readout. (active high)
OUT
OutSerie
Data of readout
TransmitOn
Readout in progress (active high)
08/02/2008
Frederic DULUCQ -