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YOGITECH Company Overview and Verification Methodology for OCP Based Systems Natale Barsotti – Verification Engineer OCP-IP Compliance Summit / TIF - Nice.

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Presentation on theme: "YOGITECH Company Overview and Verification Methodology for OCP Based Systems Natale Barsotti – Verification Engineer OCP-IP Compliance Summit / TIF - Nice."— Presentation transcript:

1 YOGITECH Company Overview and Verification Methodology for OCP Based Systems Natale Barsotti – Verification Engineer OCP-IP Compliance Summit / TIF - Nice 2/3 June 2004

2 Copyright YogiTech 2004 - Confidential2 The Company –Products and Services –Business Models –YogiTech Online Support Service –SoC and MXS Core Competencies YogiTech in OCP-IP OCP 2.0 e Verification Component –Overview –Main Features –Architecture –Deliverables –Challenges Outline

3 2/3 June 2004Copyright YogiTech 2004 - Confidential3 The Company Semiconductor Design & Verification Company Founded in August 2000 Independent, Private Share Capital 280 k Headquartered in Pisa, offices in Torino and Nice, 27 people –Verification Team: 9 people –SoC Design Team (Digital and Mixed Signal): 11 people Distinctive experience –Module and System Functional Verification based on Specman Elite –ARM based System-on-Chip –High-Reliability Chip Design for Safety Critical Applications Partnerships First Approved Design Center in Italy Member since December 2002 Tier 1 in Europe

4 2/3 June 2004Copyright YogiTech 2004 - Confidential4 Design & Verification Services –IC Design for SoC, MXS, IPs –IC Verification of Custom Blocks and System Level –Development and Support of Custom e Verification Components Catalogue – e Verification Components CAN 2.0A/B Host ATAPI 6 Device ATAPI 6 OCP 2.0 –IPs CAN 2.0A/B FaRo – CPU Based Fault Robust Platform –Integrated Design and Verification Platform –Unique Solution to Design High-Reliable ECU (Electronic Control Unit) –Development in progress Products and Services

5 2/3 June 2004Copyright YogiTech 2004 - Confidential5 Services –On Customer Site Time&Material Travelling and Subsistence cost apart –In House Per Task and/or Time&Material Travelling and Subsistence cost apart Opportunity for Design Zone Catalogue – e Verification Components Yearly License per Seat per Component Perpetual License and Yearly Maintenance per Seat per Component Customisable License Model for Lead Customers and/or Volumes Business Models

6 2/3 June 2004Copyright YogiTech 2004 - Confidential6 YogiTech Online Support Service Available since March 2003 for all of the products in the catalogue Included in the maintenance: available only to registered licensee customers Its a Web-Based Service allowing: –access to Frequently Asked Questions (FAQ) –submission of technical issues (Bug reporting, How to and Suggestion) in a ticket-based environment –Download of last version of the product and related User Guide –download of collateral documents, like tutorials, application related paper, etc. Recognized usefulness in supporting our products in Asia, US and Europe

7 2/3 June 2004Copyright YogiTech 2004 - Confidential7 SoC and MXS Core Competencies Digital Design: –From Specs to GDSII VHDL/VERILOG design, including FPGA prototyping Synthesis/Physical Synthesis/Static Time/Formal Verification/ATPG/BackEnd –IP implementation and support –Design for Test and Verification as key competency SOC Design: –System Architects for ARM, 8051 and ARC –System Integration: from few K to 5 Million Gates design (0.13-0.18-0.35 um) Analogue and Mixed Design: –Analogue-Digital Circuits Front End Low noise, low drift, low offset techniques Multi Channel Acquisition (high matching requirements) –Analogue-Digital Circuits Back End Custom layout with process analogue option (high resistive layer, etc) Layout techniques for strict matching requirements and low noise constraints High-voltage layout

8 2/3 June 2004Copyright YogiTech 2004 - Confidential8 YogiTech in OCP-IP Joined OCP-IP in December 2002 –with the mission to simplify the implementation of OCP based systems by means of innovative verification and reuse methodologies Joined OCP-IP FVWG in March 2003 –with the mission to proactively collaborate in the definition of a comprehensive OCP compliance plan to enhance the existing self-certification program First Release of OCP 2.0 e Verification Component in April 2003 –Texas Instruments has been a leading customer for the OCP e VC and currently has successfully adopted this verification tool in several key designs

9 2/3 June 2004Copyright YogiTech 2004 - Confidential9 OCP 2.0 e VC - Overview State of the art eVC functionality –Fully and easily configurable to specific DUT needs –Automated, coverage driven verification environment –Embodies full power of Specman Elite –Fully e -Reuse Methodology (eRM) compliant Strong validation: –In use at 2 multi-national customers –Customers have used eVC since April-03 –Proven by On Field Validation with the Lead Customer Strong support and commitment: –YogiTech On-line Service Support (YOSS) including FAQs –More than two years of Verification Services in OCP-based projects –Valued Member of OCP-IP FVWG and SWG State of the art eVC functionality –Fully and easily configurable to specific DUT needs –Automated, coverage driven verification environment –Embodies full power of Specman Elite –Fully e -Reuse Methodology (eRM) compliant Strong validation: –In use at 2 multi-national customers –Customers have used eVC since April-03 –Proven by On Field Validation with the Lead Customer Strong support and commitment: –YogiTech On-line Service Support (YOSS) including FAQs –More than two years of Verification Services in OCP-based projects –Valued Member of OCP-IP FVWG and SWG

10 2/3 June 2004Copyright YogiTech 2004 - Confidential10 OCP 2.0 e VC - Main Features In compliance with OCP 2.0 Specification –multi-threading transactions fully supported –…… Protocol Checker with maskable checks Database of predefined OCP Sequences –…… Full Suite of Verification Elements –BFM, Bus Monitor and Sequence Drivers Configurable as Master/Slave (or Monitor only) –Slave can also be configured as RAM Fully interoperable –with VHDL/Verilog/C/C++/SystemC models

11 2/3 June 2004Copyright YogiTech 2004 - Confidential11 OCP 2.0 e VC - Architecture BFM Sequence driver MASTER BFM Config parameters RAM SLAVE Bus Monitor + e Protocol Checker OCP Interface USER's TEST D.U.T. SLAVE D.U.T. MASTER e VC environment Config parameters

12 2/3 June 2004Copyright YogiTech 2004 - Confidential12 OCP 2.0 eVC - Deliverables Core Files –eVC Inner Layer encrypted –eVC Upper Layer fully configurable by the user Support Files –Database of predefined OCP Sequences –Sample and extensive tests covering basic functionality Documentation –Comprehensive User Guide including Release Notes –FAQ Add-On –RTLConfig2e: bridge to CoreCreator for configuring the eVC by means of the OCP RTL Configuration File Training on demand

13 2/3 June 2004Copyright YogiTech 2004 - Confidential13 OCP 2.0 e VC - Challenges Timely enhancement of e Protocol Checker based on OCP-IP FVWG outcome eVC Roadmap alignment with OCP evolution and next releases eVC Roadmap alignment with Specman Elite evolution and next releases R/D activity to include new methodologies –Adaptation of the eVC to e Celerator


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