1. Fundamentals of Digital Logic and Number Systems
Reference:
Digital Design and Computer Architecture: ARM® Edition
Sarah L. Harris and David Money Harris
CDA3101 Fall, 2017

2. Hierarchy of Computer Internals
 C Programming
 Software / Hardware Interface
 Computer Organization
 Logic Design, Number System
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3. Digital Discipline: Binary Values
Two discrete values:
1’s and 0’s
1, TRUE, HIGH
0, FALSE, LOW
1 and 0: voltage levels, rotating gears, fluid levels, etc.
Digital circuits use voltage levels to represent 1 and 0
Bit: Binary digit
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4. George Boole, 1815-1864 Born to working class parents
Taught himself mathematics and joined the faculty of Queen’s College in Ireland
Wrote An Investigation of the Laws of Thought (1854)
Introduced binary variables
Introduced the three fundamental logic operations: AND, OR, and NOT
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5. Number Systems - Integer
Decimal numbers (based 10 numbers)
Binary numbers (Computer deals with Binary, base 2 numbers)
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6. Power of 2
20 = 1
21 = 2
22 = 4
23 = 8
24 = 16
25 = 32
26 = 64
27 = 128
28 = 256
29 = 512
210 = 1024
211 = 2048
212 = 4096
213 = 8192
214 = 16384
215 = 32768
Handy to memorize up to 215
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7. Large Power of Two Kilo (K) = 1,000 = 10^3 decimal
Kibi (Ki) = 1,024 = 2^10 binary
Mega (M) = 1,000,000 = 10^6 decimal
Mebi (Mi) = 1,048,576 = 2^20 binary
Giga (G) = 1,000,000,000 = 10^9 decimal
Gibi (Gi) = 1,073,741,824 = 2^30 binary
Tera (T) = 1,000,000,000,000 = 10^12 decimal
Tebi (Ti) = 1,099,511,627,776 = 2^40 binary
Peta (P) = 1,000,000,000,000,000 = 10^15 decimal
Pebi (Pi) = 1,125,899,906,842,624 = 2^50 binary
Exa (E) = 1,000,000,000,000,000,000 = 10^18 decimal
Exai (Ei) = 1,152,921,504,606,846,976 = 2^60 binary
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8. Number Conversion Binary to decimal conversion:
Convert to decimal
16×1 + 8×0 + 4×0 + 2×1 + 1×1 = 1910
Decimal to binary conversion:
Convert 4710 to binary
32×1 + 16×0 + 8×1 + 4×1 + 2×1 + 1×1 =
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9. Decimal to Binary Conversion
Method 1: Find the largest power of 2 that fits, subtract and repeat ×1
53-32 = ×1
21-16 = ×1
5-4 = ×1 =
Method 2: Repeatedly divide by 2, remainder goes in the next most significant bit
5310 = 53/2 = 26 R1
26/2 = 13 R0
13/2 = 6 R1
6/2 = 3 R0
3/2 = 1 R1
1/2 = 0 R1 =
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10. Binary Values and Range
N-digit decimal number
How many values? 10N
Range? [0, 10N - 1]
Example: 3-digit decimal number:
103 = 1000 possible values
Range: [0, 999]
N-bit binary number
How many values? 2N
Range: [0, 2N - 1]
Example: 3-digit binary number:
23 = 8 possible values
Range: [0, 7] = [0002 to 1112]
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11. Hexadecimal Numbers
Base 16
Shorthand for binary
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12. Hexadecimal to Binary, Decimal
Hexadecimal to binary conversion:
Convert 4AF16 (also written 0x4AF) to binary
Hexadecimal to decimal conversion:
Convert 4AF16 to decimal
162× × ×15 =
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13. Bits, Bytes, Nibbles Bits Bytes & Nibbles  8 bits per byte
Bytes (Hexadecimal)
 4 bytes
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14. Addition
Decimal
Binary
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15. Binary Addition Overflow! Add the following 4-bit binary numbers
Digital systems operate on a fixed number of bits
Overflow: when result is too big to fit in the available number of bits
Overflow!
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16. Signed Binary Numbers Sign/Magnitude Numbers Two’s Complement Numbers
Use the most-significant bit as the sign bit
Two’s Complement Numbers
Use complement form to represent signed numbers
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17. Sign/Magnitude Numbers
1 sign bit, N-1 magnitude bits
Sign bit is the most significant (left-most) bit
Positive number: sign bit = 0
Negative number: sign bit = 1
Example, 4-bit sign/mag representations of ± 6:
+6 = 0110
- 6 = 1110
Range of an N-bit sign/magnitude number:
[-(2N-1-1), 2N-1-1]
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18. Sign/Magnitude Numbers
Problems:
Addition doesn’t work, for example :
1110
+ 0110
10100 (+4, wrong!)
Two representations of 0 (± 0):
1000
0000
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19. 1’s Complement Number
The ones' complement of a binary number is defined as the value obtained by inverting all the bits in the binary representation of the number (swapping 0s for 1s and vice versa). The ones' complement of the number then behaves like the negative of the original number in some arithmetic operations.
Example: (010011)2  (101100)2
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20. “Taking the Two’s Complement”
“Taking the Two’s complement” flips the sign of a two’s complement number
Method:
Invert the bits (1’s complement)
Add 1
Example: Flip the sign of 310 = 00112
(Invert the bits)
1101 = -310
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21. Two’s Complement Numbers
msb has value of ̶ 2N-1
Most positive 4-bit number: 0111
Most negative 4-bit number: 1000
The most significant bit still indicates the sign (1 = negative, 0 = positive)
Range of an N-bit two’s complement number:
[-(2N-1), 2N-1-1] +
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22. “Taking the Two’s Complement”
No duplication of ‘0’ in Two’s Complement
Sign-magnitude:
(0000)2 = (1000)2 = 0
Two’s Complement:
(0000)2 = 0
(1000)2 = -8
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23. Two’s Complement Addition
Problems with Signed-Magnitude:
Addition doesn’t work, for example :
1110
+ 0110
10100 (wrong!)
Add 6 + (-6) using two’s complement numbers
Two’s complement of -6
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24. Number System Comparison
Range
Unsigned
[0, 2N-1]
Sign/Magnitude
[-(2N-1-1), 2N-1-1]
Two’s Complement
[-2N-1, 2N-1-1]
For example, 4-bit representation:
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25. Saturating Arithmetic
Saturation means that when a calculation overflows, the result is set to the largest positive number or most negative number
Saturation is likely what you want for media operations.
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26. Memory Addressing Memory is byte-addressable, linearly ordered
For 32-bit, 64-bit addresses, what are the addressable memory sizes?
4 GB (2^32), and 16 ExaBytes (2^64)
Byte-addressable memory
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27. Memory Addressing Note, offset bits are ‘0’ to align on the word
or double-word boundary
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28. Endians & Memory Alignment
Byte-addressable Memory
Increasing
Byte address 7 6 5 4 3 2 1
Byte addressable
memory 4
Word-aligned word at byte address 4. 2
Halfword-aligned word at byte address 2. 1
Byte-aligned (non-aligned) word, at byte address 1.
word
Little-endian byte order (least-significant byte “first”).
3 (MSB) 2 1
0 (LSB)
word
Big-endian byte order (most-significant byte “first”).
0 (LSB) 1 2
3 (MSB)
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29. Logic Gates Perform logic functions: Single-input: Two-input:
inversion (NOT), AND, OR, NAND, NOR, etc.
Single-input:
NOT gate, buffer
Two-input:
AND, OR, XOR, NAND, NOR, XNOR
Multiple-input
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30. Single-Input Logic Gates
Truth Table
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31. Two-Input Logic Gates
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32. Other Two-Input Logic Gates
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33. Multiple-Input Logic Gates
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34. True Table - Decoder
Logic Function: Out0 = (NOT 10) AND (NOT 11) AND (NOT 12)
FIGURE B.3.1 A 3-bit decoder has 3 inputs, called 12, 11, and 10, and 23 = 8 outputs, called Out0 to Out7. Only the output corresponding to the binary value of the input is true, as shown in the truth table. The label 3 on the input to the decoder says that the input signal is 3 bits wide.
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35. Multiplexor Multiplexor: C = A, if S=0; C = B, if S=1
FIGURE B.3.2 A two-input multiplexor on the left and its implementation with gates on the right. The multiplexor has two data inputs (A and B), which are labeled 0 and 1, and one selector input (S), as well as an output C. Implementing multiplexors in Verilog requires a little more work, especially when they are wider than two inputs. We show how to do this beginning on page B-23.
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36. One-Bit Adder Half Adder Select AND, or OR
FIGURE B.5.2 A 1-bit adder. This adder is called a full adder; it is also called a (3,2) adder because it has 3 inputs and 2 outputs. An adder with only the a and b inputs is called a (2,2) adder or half-adder.
FIGURE B.5.1 The 1-bit logical unit for AND and OR.
FIGURE B.5.3 Input and output specification for a 1-bit adder.
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37. 1-bit Full Adder
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38. Morgan Kaufmann Publishers
28 May, 2019
Integer Addition
Example: 7 + 6
Overflow if result out of range
Adding +ve and –ve operands, no overflow
Adding two +ve operands
Overflow if result sign is 1
Adding two –ve operands
Overflow if result sign is 0
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39. Morgan Kaufmann Publishers
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Integer Subtraction
Add negation of second operand
Example: 7 – 6 = 7 + (–6)
+7: … –6: … (2’s complement) +1: …
Overflow if result out of range
Subtracting two +ve or two –ve operands, no overflow
Subtracting +ve from –ve operand
Overflow if result sign is 0
Subtracting –ve from +ve operand
Overflow if result sign is 1
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40. Overflow – Addition, Substation
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41. Morgan Kaufmann Publishers
28 May, 2019
Floating Point
Representation for non-integer numbers
Including very small and very large numbers
Like scientific notation
–2.34 × 1056
× 10–4
× 109
In binary (normalized)
±1.xxxxxxx2 × 2yyyy
Types float and double in C
Single non-zero digit to the left of decimal point
normalized
not normalized
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42. Floating Point Standard
Morgan Kaufmann Publishers
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Floating Point Standard
Defined by IEEE Std
Developed in response to divergence of representations
Portability issues for scientific code
Now almost universally adopted
Two representations
Single precision (32-bit)
Double precision (64-bit)
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43. IEEE Floating-Point Format
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IEEE Floating-Point Format
single: 8 bits double: 11 bits
single: 23 bits double: 52 bits S
Exponent
Fraction
S: sign bit (0  non-negative, 1  negative)
Normalize significand: 1.0 ≤ |significand| < 2.0
Always has a leading pre-binary-point 1 bit, so no need to represent it explicitly (hidden bit)
Significand is Fraction with the “1.” restored
Exponent: excess representation: actual exponent + Bias
Ensures exponent is unsigned (using Bias): sort neg. to pos.
Single: Bias = 127; Double: Bias = 1203
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44. Single-Precision Range
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Single-Precision Range
Exponents and reserved
Smallest value
Exponent:  actual exponent = 1 – 127 = –126
Fraction: 000…00  significand = 1.0
±1.0 × 2–126 ≈ ±1.2 × 10–38
Largest value
exponent:  actual exponent = 254 – 127 = +127
Fraction: 111…11  significand ≈ 2.0
±2.0 × ≈ ±3.4 × 10+38
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45. Floating-Point Example
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Floating-Point Example
Binary: = 1*22 + 1* *2-3 =
IEEE754 Represent –0.75
–0.75 = (–1)1 × 1.12 × 2–1
S = 1
Fraction = 1000…002
Exponent = –1 + Bias
Single: – = 126 =
Double: – = 1022 =
Single: …00
Double: …00
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46. Floating-Point Example
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Floating-Point Example
What number is represented by the single-precision float
…00
S = 1
Fraction = 01000…002
Exponent = = 129
x = (–1)1 × ( ) × 2(129 – 127)
= (–1) × 1.25 × 22
= –5.0
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47. Summary
FIGURE 3.13 EEE 754 encoding of floating-point numbers. A separate sign bit determines the sign. Denormalized numbers are described in the Elaboration on page 222. This information is also found in Column 4 of the MIPS Reference Data Card at the front of this book.
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48. Floating-Point Addition
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Floating-Point Addition
Consider a 4-digit decimal example
9.999 × × 10–1
1. Align decimal points
Shift number with smaller exponent
9.999 × × 101
2. Add significands
9.999 × × 101 = × 101
3. Normalize result & check for over/underflow
× 102
4. Round and renormalize if necessary
1.002 × 102
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49. Floating-Point Addition
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Floating-Point Addition
Now consider a 4-digit binary example
× 2–1 + – × 2–2 (Decimal: –0.4375)
1. Align binary points
Shift number with smaller exponent
× 2–1 + – × 2–1
2. Add significands
× 2–1 + – × 2–1 = × 2–1
3. Normalize result & check for over/underflow
× 2–4, with no over/underflow
4. Round and renormalize if necessary
× 2–4 (no change) =
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