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Undulator Cavity BPM Status

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Presentation on theme: "Undulator Cavity BPM Status"— Presentation transcript:

1 Undulator Cavity BPM Status
May 27, 2019 Undulator Cavity BPM Status

2 Design Review Outline BPM System Design Overview Cavity Design Electronics and ADC Current status for phase I prototype testing Planning phase II prototype test First article and production

3 LTU and Undulator BPM System Specification
Parameter Specification Limit Condition Resolution < 1m 0.2 – 1.0 nC +/- 1 mm range Offset Stability < +/- 1m 1 hour 20.0 +/ Celsius < +/- 3m 24 hours +/- 1 mm range Gain Error < +/- 10 % Dynamic Range, Position +/- 1 mm 10 mm diameter vacuum chamber Dynamic Range, Intensity > 14 dB PC Gun

4 BPM System Overview Block Diagram

5 X-Band Cavity BPM Design
Each BPM has position cavity and reference cavity SLAC selective coupling design utilized to reduce monopole mode Iris couplers are precisely EDM into Solid Copper Body Waveguide transition brazed to body

6 Cold Test Prototype Non-vacuum cold test prototype
Accelerated design verification and cold test development Removable end caps Presently used to verify tuning effects and test fixture development

7 Before and After Brazing (ITS Prototype)

8 Prototype Cold Test (Dipole cavity 500 micron offset)
Parameter (500 µm offset) Predicted Measured Prototype # 1 bolted end caps Measured Prototype # 2 brazed end caps Frequency TM010 8.262 GHz 8.271 GHz 8.243 GHz Coupling TM010 -53 dB -69 dB -62 dB Frequency TM110 GHz GHz GHz Coupling TM110 -32 dB -28 dB -24 dB Q (loaded) TM110 2704 2086 2391 X/Y Isolation TM110 -26 dB -33 dB -23 dB Dipole to Monopole cavity Isolation <-80 dB <-85 dB <-89 dB Frequency TM020 GHz GHz GHz Coupling TM020 -78 dB -64 dB -50 dB

9 Baseline Design for Phase I Prototype Miteq X-Band Low Noise Receiver
Existing product line WR 75 Waveguide Interface Low Noise Figure (2.7 dB) Budgetary price for (3 channels) $

10 Prototype Receiver Specification
Parameter Specification Limit Condition RF Frequency GHz 20.0 +/ Celsius Dx, Dy, Intensity Input Peak Power 50 watts peak No damage (limiter protection) LO Frequency GHz (2856 MHz*4) 1nC, 1mm offset, 200fs BL LO Power Range +10 dBm Max. Provide LO for 3 down converters IF Frequency 60 MHz Min. Noise Figure Dx and DY 2.7 dB Max. Noise Figure Intensity (reference) 4.0 dB Max. LO to RF Isolation 40 dB Min. LO to IF Isolation 45 dB Min. Output Power +14 dBm 1 dB compression Conversion Gain 25 dB typical

11 In-Tunnel Receiver Block Diagram

12 Prototype X-Band Low Noise Receivers
Conversion gain 28 dB Over 60 dB dynamic range Noise Figure 2.5 dB IF bandwidth MHz Receiver noise floor -88 dBm assuming 20 MHz IF bandwidth Cavity BPM Sensitivity: -54 dBm/0.2nC/1m

13 BPM System Test Approach
Phase I Injector Test Stand ITS Install single X-Band Cavity and modified off-the-shelf down converter receiver Mount BPM on two-axis translation stage Phase II LEUTL test with PC gun Install three X-Band Cavities BPMs Mount all 3 BPMs together on a two-axis translation stage

14 Injector Test Stand (ITS) Beam Parameters
Charge- 1 nC single-bunch Bunch length- ~ ps FWHM for ps laser Spot size on final screen at 5.5 MeV ~ 0.75 mm rms, ps laser

15 (Phase I) ITS BPM Test Results
BPM setup on X/Y translation stage Aligned BPM Pitch and Yaw to < 25 m Initial beam spot size 2-3 mm rms at low charge (0.05 nC) at faraday cup before adding new focusing magnets to reduce to 200 um rms Beam stability limited to 50 m rms. Laser improvements ongoing

16 ITS Data Processing Development
Cavity BPM and electronics tested using ITS beam line First raw cavity voltage outputs captured on scope 6/9/06 Mover system calibration Testing is on-going following Aug/Sep shut-down Hor. Ref. Vert.

17 ITS Data Processing Development

18 Waveforms acquired with sampling scope and processed via Epics

19 Normalized waveforms 0.05 nC charge

20 Dipole Cavity Preliminary Test Data
Parameter Predicted Value Cold Test Data ITS Test Data Frequency (TM110) GHz GHz GHz Q (loaded) (TM110) 2704 2391 2500 Isolation X/Y (TM110) -26 dB -23 dB < -20 dB Voltage Output 2.3 mV/um/nC 1.22 mV/um/nC

21 (Phase II) 3 BPM Test Schedule Milestones
Refine design and develop First Article Cavity BPM and support hardware August 06 Start 3 BPMs October 06 First unit with accelerated delivery Install 3 cavity BPMs into APS LEUTL and Test December 06

22 Prototype Phase II Cavity BPM Specification
Parameter Specification Limit (change) Condition TM110 Frequency Dipole Cavity GHz ( GHz) 20.0 +/ Celsius Loaded Q factor 3000 +/- 200 (3500 +/- 200) Power Output TM110 -10 dBm 1nC, 1mm offset, 200fs BL X/Y Cross Talk < -20 dB (<-26 dB) +/- 1 mm range TM010 Frequency Monopole Cavity ( GHz) 3000+/- 200 Power Output TM010 1nC, +/-1mm offset range, 200fs BL

23 Dipole Cavity Design Beam pipe radius = 5 mm
Cavity radius = mm ( mm) Cavity gap = 3 mm Distance beam axis to bottom of wg = 9.5 mm (10.5 mm) Waveguide= x 3 mm

24 Monopole Cavity Design
Beam pipe radius = 5 mm Cavity radius = mm ( mm) Cavity gap = 2 mm (3 mm) Coupling Slot = 2 x 4 mm (2.5 x 4 mm) Tangent to surface of cavity opening to bottom of waveguide=1.734 mm (3.75 mm) Waveguide= x 3 mm

25 Tuning Pins Feature Added
Tuning pins prototyped and tested in lab Tuning pin simulations verify lab measurements Tuning pins will improve performance and production yield Tuning Pins

26 Design Development First Article Design ITS Test Unit Cold Test Unit

27 Receiver Design Changes
Packaged 3 channel receiver High/Low gain feature (28/0dB) to extend dynamic range. Add a simple CW tone self-test feature

28 Receiver Packaging Design
Receiver enclosure 12.5 wide by 11 deep by 2.5 thick (inches) with radiation shield cover Houses input filters local oscillator and down-converter 3-WR75 Inputs, 3-type “N” outputs, LO ref. input Type “N”, power and control cable

29 SLAC ADC Development The PAD (Phase and Amplitude Detector) being considered for Cavity BPM ADC Linear Technologies LTC bit digitizer chip specified to run up to 130MHz

30 Phase II Data Acquisition Design Approach
Instrument three BPMs with SLAC Built 16-bit, 130 MSPS digitizers (PAD) Epics driver available Synchronize ADC clock with 119 MHz Digitize horizontal, vertical position and Intensity 0 to 1 volt range Digital down convert 40 MHz IF decaying exponentials

31 Phase II Testing Objectives 3 BPM Test
Test three BPM separated by fixed distance to determine single-shot Evaluate First Article Prototypes Complete test matrix to prove compliance to specification

32 System Layout and Planning
Beam X-band receiver LRU

33 Production Phase Production of 2 BPMs for LTU 04/07 Production of 6 BPMs for undulator 04/07 Production of 9 BPMs for undulator 06/07 Production of 9 BPMs for undulator 08/07 Production of 10 BPMs for undulator 10/07 Spares 12/07

34 X-Band Cavity BPM development ongoing
Summary X-Band Cavity BPM development ongoing Bolt-together prototype (non-vacuum) complete ITS prototype testing ongoing 3 BPM test prototype design enhancements ongoing Receiver Prototype Development First Prototype installed in ITS with good results 3 BPM test prototype design incorporates high/low gain, self-test and final packaging Data Acquisition and Test Collaborating with SLAC to use the same ADC as SLAC LINAC BPM upgrade


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