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Asynchronous token routing device
Balancer Asynchronous token routing device inputs outputs 1 bit of memory
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Asynchronous token routing device
Balancer Asynchronous token routing device inputs outputs 1 bit of memory
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Asynchronous token routing device
Balancer Asynchronous token routing device inputs outputs 1 bit of memory
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Asynchronous token routing device
Balancer Asynchronous token routing device inputs outputs 1 bit of memory
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Asynchronous token routing device
Balancer Asynchronous token routing device inputs outputs 1 bit of memory
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Asynchronous token routing device
Balancer Asynchronous token routing device inputs outputs 1 bit of memory
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Asynchronous token routing device
Balancer Asynchronous token routing device inputs outputs 1 bit of memory
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Asynchronous token routing device
Balancer Asynchronous token routing device inputs outputs 1 bit of memory
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Asynchronous token routing device
Balancer Asynchronous token routing device inputs outputs 1 bit of memory
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Asynchronous token routing device
Balancer Asynchronous token routing device inputs outputs 1 bit of memory
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Asynchronous token routing device
Balancer Asynchronous token routing device inputs outputs balanced token counts 1 bit of memory
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A Biochemical Balancer?
2X Y + Z inputs outputs 1 bit of memory
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Counting Network Data structure for multiprocessor coordination inputs
Aspnes, Herlihy & Shavit (1991) a d a e a e d c a c b f b f inputs outputs e b f c c g g f b e g d g d depth
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Isomorphic to Batcher’s Bitonic sorting network.
Counting Network Isomorphic to Batcher’s Bitonic sorting network. a d a e a e d c a c b f b f step sequence e b f c c g g f b e g d g d
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Balancer Snapshot inputs outputs x y 1 bit of memory
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Execution trace: token counts on all wires
Counting Network Execution trace: token counts on all wires 3 1 1 2 2 1 2 1
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Fault Tolerance Dynamic faults in the data structure:
No errors in control: No lost tokens Corrupted data No errors in network wiring Inaccessible data concurrent data structure 1
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Fault Model inputs outputs
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Fault Model fault! inputs outputs
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Fault Model inputs outputs state is inaccessible
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tokens bypass balancer
Fault Model tokens bypass balancer inputs outputs state is inaccessible
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tokens bypass balancer
Fault Model tokens bypass balancer inputs outputs state is inaccessible
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tokens bypass balancer
Fault Model tokens bypass balancer inputs outputs state is inaccessible
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tokens bypass balancer
Fault Model tokens bypass balancer inputs outputs imbalance in token counts state is inaccessible
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tokens bypass balancer
Fault Model tokens bypass balancer inputs outputs received prior to the fault received after the fault
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Naïve approach: replicate every balancer.
Fault Tolerance Naïve approach: replicate every balancer. outputs inputs
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Naïve approach: replicate every balancer.
Fault Tolerance Naïve approach: replicate every balancer. inputs outputs
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Naïve approach: replicate every balancer.
Fault Tolerance Naïve approach: replicate every balancer. inputs outputs
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Naïve approach: replicate every balancer.
Fault Tolerance Naïve approach: replicate every balancer. inputs outputs
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Naïve approach: replicate every balancer.
Fault Tolerance Naïve approach: replicate every balancer. inputs outputs
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Naïve approach: replicate every balancer.
Fault Tolerance Naïve approach: replicate every balancer. fault! inputs outputs
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Naïve approach: replicate every balancer.
Fault Tolerance Naïve approach: replicate every balancer. inputs outputs
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Naïve approach: replicate every balancer.
Fault Tolerance Naïve approach: replicate every balancer. inputs outputs
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Naïve approach: replicate every balancer.
Fault Tolerance Naïve approach: replicate every balancer. inputs outputs imbalance in token counts Doesn’t work!
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Remapping Faulty Balancers
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Remapping Faulty Balancers
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Remapping Faulty Balancers
inaccessible balancer
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Remapping Faulty Balancers
Redirect pointers to spare balancer inaccessible balancer spare balancer, random initial state
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Fault Model inputs outputs
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Fault Model fault! inputs outputs
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spurious state transition
Fault Model Remapped balancer inputs outputs spurious state transition
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spurious state transition
Fault Model Remapped balancer inputs outputs spurious state transition
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spurious state transition
Fault Model Remapped balancer inputs outputs imbalance in token counts spurious state transition
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Fault Model Remapped balancer inputs outputs x y
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Error Bound Error bound for the output sequence of a balancing network with remapped balancers: Balancing Network k faults
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Distance Measure The distance between two sequences and is:
Definition: Balancing Network k faults gives number of “misplaced tokens”
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Two identical balancing networks, given same inputs:
Error Bound Two identical balancing networks, given same inputs: no faults k faults
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Error Bound Execution without faults: 3 1 1 2 2 1 2 1
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Error Bound Execution with a fault: 3 1 3 1 1 2 1 2 2 1 3 2 1 2 1 3 2
3 1 1 2 1 2 2 1 3 2 1 2 1 3 2 1
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Error Bound Distance: 2 1 3 = 1 = 0 2 1
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Strategy: to correct k faults, append k copies.
Correction Network Strategy: to correct k faults, append k copies. smooth sequence step sequence with k errors step sequence CORRECT[n] #1 CORRECT[n] #k
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Strategy: Construct a block which reduces error by one.
Correction Network Strategy: Construct a block which reduces error by one. step sequence with k errors step sequence with errors CORRECT[n]
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Correction Network To reduce error by one:
balance smallest and largest entries. step sequence with k errors largest value smallest value step sequence with errors BUTTERFLY[n]
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Butterfly Network Network which separates out smallest and largest entries: 1 10 34 1 6 5 17 4 3 2 9 8 7 6 5 largest value smallest value
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Butterfly Network error reduced Balance smallest and largest entries:
1 4 7 6 5 1 3 6 10 6 3 6 1 5 2 5 1 9 6 1 9 6 34 17 9 6 17 8 5
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Fault Tolerance Solution:
Counting Network constructed with FT balancers. Counting Network FT Counting Network tolerates k faults
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Fault-Tolerant Balancer
k+1 “pseudo-balancers”, two bits of memory each inputs outputs L F tolerates k faults
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Pseudo-Balancer two bits of memory state: up or down
inputs outputs L two bits of memory state: up or down status: leader (L) or follower (F)
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Leader two bits of memory Accepts tokens on either wire.
inputs outputs L incoming tokens colored green Accepts tokens on either wire. Colors outgoing tokens red.
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Leader two bits of memory Accepts tokens on either wire.
inputs outputs L incoming tokens colored green Accepts tokens on either wire. Colors outgoing tokens red.
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Leader two bits of memory Accepts tokens on either wire.
inputs outputs L incoming tokens colored green Accepts tokens on either wire. Colors outgoing tokens red.
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Leader two bits of memory Accepts tokens on either wire.
inputs outputs L incoming tokens colored green Accepts tokens on either wire. Colors outgoing tokens red.
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Leader two bits of memory Accepts tokens on either wire.
inputs outputs L incoming tokens colored green Accepts tokens on either wire. Colors outgoing tokens red.
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Follower two bits of memory Accepts red tokens in order. inputs
outputs F Accepts red tokens in order.
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Follower two bits of memory Accepts red tokens in order. inputs
outputs F Accepts red tokens in order.
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Follower two bits of memory Accepts red tokens in order. inputs
outputs F Accepts red tokens in order.
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Follower two bits of memory Accepts red tokens in order. inputs
outputs F Accepts red tokens in order.
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Follower two bits of memory Accepts red tokens in order. inputs
outputs F Accepts red tokens in order.
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Follower two bits of memory Accepts red tokens in order. inputs
outputs F Accepts red tokens in order.
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