1. Operating Systems Principles Memory Management Lecture 8: Virtual Memory
主講人：虞台文

2. Content Principles of Virtual Memory Implementations of Virtual Memory
Paging
Segmentation
Paging With Segmentation
Paging of System Tables
Translation Look-Aside Buffers
Memory Allocation in Paged Systems
Global Page Replacement Algorithms
Local Page Replacement Algorithms
Load Control and Thrashing
Evaluation of Paging

3. Principles of Virtual Memory
Operating Systems Principles Memory Management Lecture 8: Virtual Memory
Principles of Virtual Memory

4. The Virtual Memory
Virtual memory is a technique that allows processes that may not be entirely in the memory to execute by means of automatic storage allocation upon request.
The term virtual memory refers to the abstraction of separating LOGICAL memory  memory as seen by the process  from PHYSICAL memory  memory as seen by the processor.
The programmer needs to be aware of only the logical memory space while the operating system maintains two or more levels of physical memory space.

5. Principles of Virtual Memory . . .
3FFFFFF
Physical
Memory
64M
FFFFFFFF
FFFFFFFF 4G
Virtual
Memory 4G
Virtual
Memory

6. Principles of Virtual Memory . . .
Address
Map
Address
Map
3FFFFFF
Physical
Memory
64M
FFFFFFFF
FFFFFFFF 4G
Virtual
Memory 4G
Virtual
Memory

7. Principles of Virtual Memory . .
For each process, the system creates the illusion of large contiguous memory space(s)
Relevant portions of Virtual Memory (VM) are loaded automatically and transparently
Address Map translates Virtual Addresses to Physical Addresses .
Address
Map
Address
Map
3FFFFFF
Physical
Memory
64M
FFFFFFFF
FFFFFFFF 4G
Virtual
Memory 4G
Virtual
Memory

8. Approaches Single-segment Virtual Memory:
One area of 0…n1 words
Divided into fix-size pages
Multiple-Segment Virtual Memory:
Multiple areas of up to 0…n1 (words)
Each holds a logical segment (e.g., function, data structure)
Each is contiguous or divided into pages . . . .

9. Main Issues in VM Design
Address mapping
How to translate virtual addresses to physical addresses?
Placement
Where to place a portion of VM needed by process?
Replacement
Which portion of VM to remove when space is needed?
Load control
How many process could be activated at any one time?
Sharing
How can processes share portions of their VMs?

10. Implementations of Virtual Memory
Operating Systems Principles Memory Management Lecture 8: Virtual Memory
Implementations of Virtual Memory

11. Implementations of VM Paging Segmentation Paging With Segmentation
Paging of System Tables
Translation Look-aside Buffers

12. Paged Virtual Memory Virtual Address (p, w) Page size 2n
Page No.
Offset 1
Page
size 2n 1 2 2 w p
2n1
Virtual Address
(p, w)
P1
Virtual Memory

13. Physical Memory Physical Address (f, w)
The size of physical memory is usually much smaller than the size of virtual memory.
Physical Memory
Frame No.
Offset 1
Frame
size 2n 1 2 2 w f
2n1
F1
Physical Address
(f, w)
Physical Memory

14. Virtual & Physical Addresses
The size of physical memory is usually much smaller than the size of virtual memory.
Virtual & Physical Addresses
Memory
Size
Address
|p| bits
|w| bits va
Page number p
Offset w
| f | bits
|w| bits pa
Frame number f
Offset w

15. Address Mapping Address Map Given (p, w), how to determine f from p?
Page No. 1 2 p
P1
Virtual Memory
Frame No. 1 2 f
F1
Physical Memory
(f, w)
(p, w)
Address
Map

16. Address Mapping Address Map
Each process (pid = id) has its own virtual memory.
Given (id, p, w), how to determine f from (id, p)?
Address Mapping
Page No. 1 2 p
P1
Virtual Memory
Frame No. 1 2 f
F1
Physical Memory
(f, w)
(id, p, w)
Address
Map

17. Frame Tables Given (id, p, w), how to determine f from (id, p)?
Each process (pid = id) has its own virtual memory.
Given (id, p, w), how to determine f from (id, p)?
Frame Tables ID p w
frame f 1 ID p
Frame Table FT w 1 f
F1
frame f f ID p
frame f +1
pid
page
Physical Memory

18. Address Translation via Frame Table
Each process (pid = id) has its own virtual memory.
Given (id, p, w), how to determine f from (id, p)?
Address Translation via Frame Table
address_map(id,p,w){
pa = UNDEFINED;
for(f=0; f<F; f++)
if(FT[f].pid==id &&
FT[f].page==p) pa = f+w;
return pa; }

19. Disadvantages
Inefficient: mapping must be performed for every memory reference.
Costly: Search must be done in parallel in hardware (i.e., associative memory).
Sharing of pages difficult or not possible.

20. Associative Memories as Translation Look-Aside Buffers
When memory size is large, frame tables tend to be quite large and cannot be kept in associative memory entirely.
To alleviate this, associative memories are used as translation look-aside buffers.
To be detailed shortly.

21. Page Tables frame f 1 p w w frame f PTR p f frame f +1 Page Tables
Physical Memory
frame f 1 p w w
frame f
PTR p
Page Table Register f
frame f +1
Page Tables

22. Page Tables address_map(p, w) { pa = *(PTR+p)+w; return pa; }
A page table keeps track of current locations of all pages belonging to a given process.
PTR points at PT of the current process at run time by OS.
Drawback:
An extra memory accesses needed for any read/write operations.
Solution:
Translation Look-Aside Buffer

23. Demand Paging Pure Paging Demand Paging
All pages of VM can be loaded initially
Simple, but maximum size of VM = size of PM
Demand Paging
Pages a loaded as needed: “on demand”
Additional bit in PT indicates
a page’s presence/absence in memory
“Page fault” occurs when page is absent

24. Demand Paging Pure Paging Demand Paging
True: the mth page is in memory.
False: the mth page is missing.
resident(m)
Demand Paging
Pure Paging
All pages of VM can be loaded initially
Simple, but maximum size of VM = size of PM
Demand Paging
Pages a loaded as needed: “on demand”
Additional bit in PT indicates
a page’s presence/absence in memory
“Page fault” occurs when page is absent
address_map(p, w) {
if (resident(*(PTR+p))) {
pa = *(PTR+p)+w; return pa; }
else page_fault; }

25. Segmentation Multiple contiguous spaces (“segments”)
More natural match to program/data structure
Easier sharing (Chapter 9)
va = (s, w) mapped to pa (but no frames)
Where/how are segments placed in PM?
Contiguous versus paged application

26. Contiguous Allocation Per Segment
Each segment is contiguous in PM
Segment Table (ST) tracks starting locations
STR points to ST
Address translation:
Drawback:
External fragmentation
address_map(s, w) {
if (resident(*(STR+s))) {
pa = *(STR+s)+w;
return pa; }
else segment_fault;

27. Paging with segmentation

28. Paging with segmentation
Each segment is divided into fix-size pages
va = (s, p, w)
|s| determines # of segments (size of ST)
|p| determines # of pages per segment (size of PT)
|w| determines page size
Address Translation:
Drawback:
2 extra memory references
address_map(s, p, w) {
pa = *(*(STR+s)+p)+w;
return pa; }

29. Paging of System Tables

30. Paging of System Tables
Drawback: 3 extra memory references.
Paging of System Tables
ST or PT may be too large to keep in PM
Divide ST or PT into pages
Keep track by additional page table
Paging of ST
ST divided into pages
Segment directory keeps track of ST pages
Address Translation:
address_map(s1, s2, p, w) {
pa = *(*(*(STR+s1)+s2)+p)+w;
return pa; }

31. Translation Look-Aside Buffers (TLB)
Advantage of VM
Users view memory in logical sense.
Disadvantage of VM
Extra memory accesses needed.
Solution
Translation Look-aside Buffers (TLB)
A special high-speed memory
Basic idea of TLB
Keep the most recent translation of virtual to physical addresses readily available for possible future use.
An associative memory is employed as a buffer.

32. Translation Look-Aside Buffers (TLB)

33. Translation Look-Aside Buffers (TLB)
When the search of (s, p) fails, the complete address translation is needed.
Replacement strategy: LRU.

34. Translation Look-Aside Buffers (TLB)
The buffer is searched associatively (in parallel)

35. Memory Allocation in Paged Systems
Operating Systems Principles Memory Management Lecture 8: Virtual Memory
Memory Allocation in Paged Systems

36. Memory Allocation with Paging
Placement policy 
where to allocate the memory on request?
Any free frame is OK (no external fragmentation)
Keep track of available space is sufficient both for statically and dynamically allocated memory systems
Replacement policy 
which page(s) to be replaced on page fault?
Goal: Minimize the number of page faults and/or the total number pages loaded.

37. Global/Local Replacement Policies
Global replacement:
Consider all resident pages (regardless of owner).
Local replacement
Consider only pages of faulting process, i.e., the working set of the process.

38. Criteria for Performance Comparison
Tool: Reference String (RS)
r0 r1 ... rt ... rT
rt : the page number referenced at time t
Criteria:
The number of page faults
The total number of pages loaded

39. Criteria for Performance Comparison
Tool: Reference String (RS)
r0 r1 ... rt ... rT
rt : the page number referenced at time t
Criteria:
The number of page faults
The total number of pages loaded
To be used in the following discussions.
Equivalent =1

40. Global Page Replacement Algorithms
Optimal Replacement Algorithm (MIN)
Accurate prediction needed
Unrealizable
Random Replacement Algorithm
Playing roulette wheel
FIFO Replacement Algorithm
Simple and efficient
Suffer from Belady’s anormaly
Least Recently Used Algorithm (LRU)
Doesn’t suffer fro Belady’s anormaly, but high overhead
Second-Chance Replacement Algorithm
Economical version of LRU
Third-Chance Replacement Algorithm
Considering dirty pages

41. Optimal Replacement Algorithm (MIN)
Replace page that will not be referenced for the longest time in the future.
Problem:
Reference String not known in advance.

42. Example: Optimal Replacement Algorithm (MIN)
Replace page that will not be referenced for the longest time in the future.
Example: Optimal Replacement Algorithm (MIN)
RS = c a d b e b a b c d
2 page faults
Time t RS
Frame 0
Frame 1
Frame 2
Frame 3
INt
OUTt 1 2 3 4 5 6 7 8 9 10 c a d b e b a b c d a b c d a b c d a b c d a b c d a b c d a b c e a b c e a b c e a b c e a b c e d b c e e d d a
Problem: Reference String not known in advance.

43. Random Replacement Program reference string are never know in advance.
Without any prior knowledge, random replacement strategy can be applied.
Is there any prior knowledge available for common programs?
Yes, the locality of reference.
Random replacement is simple but without considering such a property.

44. The Principle of Locality
Most instructions are sequential
Except for branch instruction
Most loops are short
for-loop
while-loop
Many data structures are accessed sequentially
Arrays
files of records

45. FIFO Replacement Algorithm
FIFO: Replace oldest page
Assume that pages residing the longest in memory are least likely to be referenced in the future.
Easy but may exhibit Belady’s anormaly, i.e.,
Increasing the available memory can result in more page faults.

46. Example: FIFO Replacement Algorithm
Replace oldest page.
Example: FIFO Replacement Algorithm
RS = c a d b e b a b c d
5 page faults
Time t RS
Frame 0
Frame 1
Frame 2
Frame 3
INt
OUTt 1 2 3 4 5 6 7 8 9 10 c a d b e b a b c d  a b c d  a b c d  a b c d  a b c d  a b c d e b c d e b c d e a c d e a b d  e a b c d a b c      e a a b b c c d d e

47. Example: Belady’s Anormaly
RS = dcbadcedcbaecdcbae
Time t RS
Frame 0
Frame 1 1 2 3 4 5 6 7 8 9 d c b a e
17 page faults
Time t RS
Frame 0
Frame 1 1 2 3 4 5 6 7 8 9
Frame 2
14 page faults d c b a e

48. Example: Belady’s Anormaly
Time t RS
Frame 0
Frame 1 1 2 3 4 5 6 7 8 9
Frame 2
Frame 3 d c b a e
15 page faults
Time t RS
Frame 0
Frame 1 1 2 3 4 5 6 7 8 9
Frame 2
14 page faults d c b a e

49. Least Recently Used Replacement (LRU)
Replace Least Recently Used page
Remove the page which has not been referenced for the longest time.
Comply with the principle of locality
Doesn’t suffer from Belady’s anormaly

50. Example: Least Recently Used Replacement (LRU)
Replace Least Recently Used page.
Example: Least Recently Used Replacement (LRU)
RS = c a d b e b a b c d
3 page faults
Time t RS
Frame 0
Frame 1
Frame 2
Frame 3
INt
OUTt 1 2 3 4 5 6 7 8 9 10
Queue end
Queue head c a d b e b a b c d a b c d a b c d a b c d a b c d a b c d a b e d a b e d a b e d a b e d a b e c a b d c e c c d d e d c b a c d b a a c d b d a c b b d a c e b d a b e d a a b e d b a e d c b a e d c b a

51. LRU Implementation Software queue: too expensive Time-stamping
Stamp each referenced page with current time
Replace page with oldest stamp
Hardware capacitor with each frame
Charge at reference
Replace page with smallest charge
n-bit aging register with each frame
Set left-most bit of referenced page to 1
Shift all registers to right at every reference or periodically
Replace page with smallest value
R = Rn1 Rn2… R1 R0

52. Second-Chance Algorithm
Also called clock algorithm since search cycles through page frames.
Second-Chance Algorithm
Approximates LRU
Implement use-bit u with each frame
Set u=1 when page referenced
To select a page:
If u==0, select page
Else, set u=0 and consider next frame
Used page gets a second chance to stay in PM

53. Example: Second-Chance Algorithm
To select a page:
If u==0, select page
Else, set u=0 and consider next frame
cycle through
page frames
Example: Second-Chance Algorithm
RS = c a d b e b a b c d
4 page faults
Time t RS
Frame 0
Frame 1
Frame 2
Frame 3
INt
OUTt 1 2 3 4 5 6 7 8 9 10 c a d b e b a b c d 
a/1
b/1
c/1
d/1 
a/1
b/1
c/1
d/1 
a/1
b/1
c/1
d/1 
a/1
b/1
c/1
d/1 
a/1
b/1
c/1
d/1
e/1
b/0
c/0
d/0
e/1
b/1
c/0
d/0
e/1
b/0
a/1
d/0
e/1
b/1
a/1
d/0 
e/1
b/1
a/1
c/1
d/1
b/0
a/0
c/0      e a a c c d d e

54. Third-Chance Algorithm
Second chance algorithm does not distinguish between read and write access
Write access more expensive
Give modified pages a third chance:
u-bit set at every reference (read and write)
w-bit set at write reference
to select a page, cycle through frames, resetting bits, until uw==00:
uw  uw
* (remember modification)
select
Can be implemented by an additional bit.

55. Example: Third-Chance Algorithm
uw  uw *
select
Example: Third-Chance Algorithm
RS = c aw d bw e b aw b c d
3 page faults
Time t RS
Frame 0
Frame 1
Frame 2
Frame 3
INt
OUTt 1 2 3 4 5 6 7 8 9 10 c aw d bw e b aw b c d 
a/10
b/10
c/10
d/10 
a/10
b/10
c/10
d/10 
a/11
b/10
c/10
d/10 
a/11
b/10
c/10
d/10 
a/11
b/11
c/10
d/10
a/00*
b/00*
e/10
d/00
a/00*
b/10*
e/10
d/00
a/11
b/10*
e/10
d/00
a/11
b/10*
e/10
d/00 
a/11
b/10*
e/10
c/10
a/00*
d/10
e/00
c/00      e c c d d b

56. Local Page Replacement Algorithms
Measurements indicate that Every program needs a “minimum” set of pages
If too few, thrashing occurs
If too many, page frames are wasted
The “minimum” varies over time
How to determine and implement this “minimum”?
Depending only on the behavior of the process itself.

57. Local Page Replacement Algorithms
Optimal Page Replacement Algorithm (VMIN)
The Working Set Model (WS)
Page Fault Frequency Replacement Algorithm (PFF)

58. Optimal Page Replacement Algorithm (VMIN)
The method
Define a sliding window (t, t +)  width  + 1
 is a parameter (a system constant)
At any time t, maintain as resident all pages visible in window
Guaranteed to generate smallest number of page faults corresponding to a given window width.

59. Example: Optimal Page Replacement Algorithm (VMIN)
 = 3
Example: Optimal Page Replacement Algorithm (VMIN)
RS = c c d b c e c e a d
5 page faults
Time t RS
Page a
INt
OUTt 1 2 3 4 5 6 7 8 9 10 c d b e a
Page b
Page c
Page d
Page e  

60. Example: Optimal Page Replacement Algorithm (VMIN)
 = 3
Example: Optimal Page Replacement Algorithm (VMIN)
RS = c c d b c e c e a d
5 page faults
Time t RS
Page a
INt
OUTt 1 2 3 4 5 6 7 8 9 10 c d b e a
Page b
Page c
Page d
Page e  

61. Example: Optimal Page Replacement Algorithm (VMIN)
 = 3
By increasing , the number of page faults can arbitrarily be reduced, of course at the expense of using more page frames.
VMIN is unrealizable since the reference string is unavailable.
Example: Optimal Page Replacement Algorithm (VMIN)
RS = c c d b c e c e a d
5 page faults
Time t RS
Page a
INt
OUTt 1 2 3 4 5 6 7 8 9 10 c d b e a
Page b
Page c
Page d
Page e  

62. Working Set Model Use trailing window (instead of future window)
Working set W(t, ) is all pages referenced during the interval (t – , t) (instead of (t, t + ) )
At time t:
Remove all pages not in W(t, )
Process may run only if entire W(t, ) is resident

63. Example: Working Set Model
 = 3
Example: Working Set Model
RS = e d a c c d b c e c e a d
5 page faults
Time t RS
Page a
INt
OUTt 1 2 3 4 5 6 7 8 9 10 c d b e a
Page b
Page c
Page d
Page e  

64. Example: Working Set Model
 = 3
Example: Working Set Model
RS = e d a c c d b c e c e a d
5 page faults
Time t RS
Page a
INt
OUTt 1 2 3 4 5 6 7 8 9 10 c d b e a
Page b
Page c
Page d
Page e  

65. Approximate Working Set Model
Drawback: costly to implement
Approximations:
1. Each page frame with an aging register
Set left-most bit to 1 whenever referenced
Periodically shift right all aging registers
Remove pages which reach zero from working set.
2. Each page frame with a use bit and a time stamp
Use bit is turned on by hardware whenever referenced
Periodically do following for each page frame:
Turn off use-bit if it is on and set current time as its time stamp
Compute turn-off time toff of the page frame
Remove the page from the working set if toff > tmax

66. Page Fault Frequency (PFF) Replacement
Main objective: Keep page fault rate low
Basic principle:
If the time btw the current (tc) and the previous (tc1) page faults exceeds a critical value , all pages not referenced during that time interval are removed from memory.
The algorithm of PFF:
If time between page faults  
grow resident set by adding new page to resident set
If time between page faults > 
shrink resident set by adding new page and removing all pages not referenced since last page fault

67. Example: Page Fault Frequency (PFF) Replacement
 = 2
Example: Page Fault Frequency (PFF) Replacement
RS = c c d b c e c e a d
5 page faults
Time t RS
Page a
INt
OUTt 1 2 3 4 5 6 7 8 9 10 c d b e a
Page b
Page c
Page d
Page e  
a, e
b, d

68. Example: Page Fault Frequency (PFF) Replacement
 = 2
Example: Page Fault Frequency (PFF) Replacement
RS = c c d b c e c e a d
5 page faults
Time t RS
Page a
INt
OUTt 1 2 3 4 5 6 7 8 9 10 c d b e a
Page b
Page c
Page d
Page e  
a, e
b, d

69. Load Control and Trashing
Main issues:
How to choose the degree of multiprogramming?
Decrease? Increase?
When level decreased, which process should be deactivated?
When a process created or a suspended one reactivated, which of its pages should be loaded?
One or many?
Load Control
Policy to set the number & type of concurrent processes
Thrashing
Most system’s effort pays on moving pages between main and secondary memory, i.e., low CPU utilization.

70. Load control  Choosing Degree of Multiprogramming
Local replacement:
Each process has a well-defined resident set, e.g., Working set model & PFF replacement
This automatically imposes a limit, i.e., up to the point where total memory is allocated.
Global replacement
No working set concept
Use CPU utilization as a criterion
With too many processes, thrashing occurs

71. Load control  Choosing Degree of Multiprogramming
Local replacement:
Each process has a well-defined resident set, e.g., Working set model & PFF replacement
This automatically imposes a limit, i.e., up to the point where total memory is allocated.
Global replacement
No working set concept
Use CPU utilization as a criterion
With too many processes, thrashing occurs
L = mean time between faults S = mean page fault service time

72. Load control  Choosing Degree of Multiprogramming
How to determine the optimum, i.e., Nmax
Load control  Choosing Degree of Multiprogramming
Thrashing
Local replacement:
Each process has a well-defined resident set, e.g., Working set model & PFF replacement
This automatically imposes a limit, i.e., up to the point where total memory is allocated.
Global replacement
No working set concept
Use CPU utilization as a criterion
With too many processes, thrashing occurs
L = mean time between faults S = mean page fault service time

73. Load control  Choosing Degree of Multiprogramming
How to determine Nmax ?
Load control  Choosing Degree of Multiprogramming
L=S criterion:
Page fault service S needs to keep up with mean time between faults L.
50% criterion:
CPU utilization is highest when paging disk 50% busy (found experimentally).
Clock load control
Scan the list of page frames to find replaced page.
If the pointer advance rate is too low, increase multiprogramming level.

74. Load control  Choosing the Process to Deactivate
Lowest priority process
Consistent with scheduling policy
Faulting process
Eliminate the process that would be blocked
Last process activated
Most recently activated process is considered least important.
Smallest process
Least expensive to swap in and out
Largest process
Free up the largest number of frames

75. Load control  Prepaging
Which pages to load when process activated
Prepage last resident set

76. Evaluation of Paging Advantages of paging
Simple placement strategy
No external fragmentation
Parameters affecting the dynamic behavior of paged systems
Page size
Available memory

77. Evaluation of Paging

78. Evaluation of Paging Prepaging is important.
A process requires a certain percentages of its pages within the short time period after activation.

79. Evaluation of Paging Smaller page size is beneficial.
However, small pages require lager page tables.
Evaluation of Paging
Smaller page size is beneficial.
Another advantage with a small page size:
Reduce memory waste due to internal fragmentation.

80. W: Minimum amount of memory to avoid thrashing.
Evaluation of Paging
W: Minimum amount of memory to avoid thrashing.
Load control is important.