Techno Week, 9th July 2018, Barcelona, Spain

High-performance on-board computer, data handling and SDR platform for cubesats
Techno Week, 9th July 2018, Barcelona, Spain D. Roma1,4 , J. Ramos-Castro2,4, J. Bosch3, A. Camps2,4, A. Casas1,4, M. Carmona3,4, J. Colome2,4, L. Gesa1,4, J.M. Gomez 3,4, J. Mauricio 3,4, J.F. Muñoz 2,4, J. Portell 3,4, C. Sierra1,4 1 Institute of Space Sciences (ICE-CSIC), Barcelona, Spain 2 Grup de Recerca en Ciències i Tecnologies de l'Espai (CTE-CRAE-UPC), Barcelona, Spain 3 Institut de Ciències del Cosmos (ICC-UB), Barcelona, Spain 4 Institut d’Estudis Espacials de Catalunya IEEC

Outline Motivation Team expertise System overview
High-performance on-board computer, data handling and SDR platform for cubesats Outline Motivation Team expertise System overview On-Board Computer (OBC) On-Board Data Handling (OBDH) Software Defined Radio (SDR) Future use cases Conclusions First I will start with which is the motivation behind this project. Then we will see the background of the people involved in this project. Afterwards, a system overview of the platform and then the three main components: the On-board computer, the on-board data handling and the software defined radio. Then we will see some future use cases and finally some conclusions. Institut d'Estudis Espacials de Catalunya

Motivation Several ongoing projects and proposals require a space platform with high throughput processing capabilities, usable for different kinds of scientific payloads with different interfaces. Current commercial available solutions lack of: High processing power Difficulties to adapt to different payloads, requiring custom solution  Overheads to all projects (effort to verify and integrate every time: “reinventing the wheel”) Our aim: General purpose high processing capable solution requiring minimal changes to adapt to different projects. Knowledge in-house  reduce costs, shorten development time, precise control of manufacturing process. The motivation behind this platform comes from the need inside of the different institutes of the IEEC. In these institutes they’re several ongoing projects and proposals that require a platform with high processing capabilities. Furthermore, these platform shall be able to interface with different kind of scientific payloads. The current commercial available solution lack of the processing power required for some of this projects. Even more, there is a difficulty to adapt the interface of these commercial platforms with the payloads, which may require custom interface solutions. Hence, our aim is to provide a general purpose high processing capable solution which requires minimal customization for the different projects. Finally, having the knowledge in house will allow us to reduce the cost for the different missions; shorten the development time since the same team that has designed the platform will be available to make the small changes required and finally have a precise control of the manufacturing process. Institut d'Estudis Espacials de Catalunya

Team expertise Joint effort of the different institutes collaborating inside IEEC: Group of experts from successfully accomplished space missions. Complementary backgrounds and expertise fields fully covering required knowledge for designing and implementing a high-performance platform for cubesats. The institutes collaborating inside the IEEC are: Institute of Space Sciences, part of the Consejo Superior de Investigaciones Científicas (IEEC-CSIC) Centre de Recerca de l'Aeronàutica i de l'Espai, part of the Universitat Politècnica de Catalunya (CRAE-UPC) Institut de Ciències del Cosmos, part of the Universitat de Barcelona (ICC-UB) The team working on this platform comes from the joint effort of the different institutes collaborating inside the IEEC. In this sense, a group of experts from successfully accomplished space missions has been gathered from the different institutes to carry out this design. They provide the complementary knowledge required to fully cover the design and implementation of such a platform. This institutes collaborating inside the IEEC are: The Institute of Space Science, part of the Spanish National Research Council. The Centre of Research for Aeronautics and Space, part of the Polytechnic University of Barcelona And the Institute of Cosmos Sciences, part of the University of Barcelona. Institut d'Estudis Espacials de Catalunya

IEEC-CSIC Team members developed a large expertise, more than a decade, in software programming for critical applications running in space hardware. Involved in design and implementation of Data Management Unit (DMU) for LISA PathFinder mission, recently finished with huge success. Payload subsystems include: Processing computer Extremely precise diagnostic equipment Sensors and actuators (in magnetics, temperatures and radiation) Mission critical flight software, following ESA standards for development, test and validation (ECSS E-40B and ECSS Q-80B). Currently involved in definition phase for LISA, the Large Mission #3 of ESA. The IEEC-CSIC main expertise provided to this project is in software. The team members from this institute have a large expertise in software programming for critical applications running in space hardware. They developed this knowledge under the LISA Pathfinder mission, which recently finished with huge success. Also, they are currently involved in the definition phase for LISA. Hence, all the software they have developed for this project has a large heritage from the LISA PathFinder mission and follows the ESA standards. Institut d'Estudis Espacials de Catalunya

CTE-UPC Succesfully launched two cubesats already Working on three “3Cat” (read as “cubecat”) series: 3Cat-4: ESA Educational Program Fly your Satellite 3Cat-5 A/B: FSSCAT Copernicus Masters Winner The CTE-UPC has successfully launched two cubesats and is currently working on three other cubesats: the cubecat-4 cubesat, part of the ESA Educational Program Fly your satellite and the two cubecat-5 cubesats, which were the Copernicus Master winners. In this sense, UPC provides its knowledge at system level for cubesats. 3Cat-1 Flat Satellite 7 small P/Ls Launch: PSLV, H (TBC) 3Cat-2 FM: PYCARO: GNSS-R P/L: L1+L2, R&LHCP, multi-constellation Launch: LMD2, August 2016 3Cat-3 (artists view): Multispectral imager Mission: in stand by FSSCAT: Copernicus Masters winner 3Cat-5/A: FMPL-2: GNSS-R + uW radiometer 3Cat-5/B: Hyperspectral imager Launch Vega SSMS, 2019 3Cat-4: ESA Educational Program Fly your Satellite program FMPL-1: GNSS-R + uW radiometer + AIS Launch: ISS, 2019 (TBC) Institut d'Estudis Espacials de Catalunya

ICC-UB Expertise from different space mission contributions:
High-performance on-board computer, data handling and SDR platform for cubesats ICC-UB Expertise from different space mission contributions: Engineers participating in SO/PHI (Polarimetric and Helioseismic Imager for Solar Orbiter). Successfully developed and implemented an Image Stabilization System based on a tracking camera. Large experience in space qualified hardware and firmware design. Engineers participating in the Gaia space astrometry mission. On-board: payload data handling and compression. On-ground: initial data treatment, massive data processing. Instrumental models and simulations. The ICC-UB provides it’s expertise from two different working groups: on one side, from hardware and firmware for space designs. This knowledge comes from they experience gathered for the Polarimetric and Helioseismic Imager instrument for the Solar Orbiter mission, specifically in the development of an Image Stabilization System based on a tracking camera. From the other side, through the team working on the Gaia mission. This team has a large knowledge in software designed for payload data handling and processing. Institut d'Estudis Espacials de Catalunya

System Overview Hardware will be split in 3 boards:
High-performance on-board computer, data handling and SDR platform for cubesats System Overview Hardware will be split in 3 boards: Motherboard, with On-Board Computer (OBC) hardware. Daughterboard, directly attached to motherboard, acting as On-Board Data Handling (OBDH). Daughterboard, with Software Defined Radio (SDR). The platform hardware is split into three boards: The motherboard, which has on it the On-Board Computer, all the connectors and interfaces to the rest of the platform and also the interface between the two daughterboards. And the two daughterboards, the OBDH and the SDR. Space for three holes to adapt to ISIS, Pumpkin, Gomspace launcher. Institut d'Estudis Espacials de Catalunya

System Overview First power-up in orbit: OBC. Acquire telemetry, communication with ground, monitor all subsystems, responsible to start power supply to OBDH and SDR. OBDH: Controlling and processing payload data SDR: Communications and navigation All internal power supplies: Large set of protections (OVP, OCP, thermal, …), provide housekeeping (current, voltage, …), allow changing their voltage value and sequencing. Optional components and external connectors on the motherboard, installation will depend on specific project needs. Daughterboards will be always the same. The first element which will boot of this platform is the OBC. It’s main tasks is to communicate with ground for telemetry and telecommand, monitoring all the other subsystems, and control when to start the OBDH and the SDR. The OBDH will the responsible to control and process the scientifically payload and then send this data through the SDR to ground. As a general rule of this platform, all internal power supplies have OV, OC and thermal protections. They also provide housekeeping information such a current and voltage. Furthermore, all of the power suppies are software configurable, allowing changing the output voltage and the power-up sequence between them. Finally, to make this platform more easier customizable for the different payloads, all the external connectors and optional components, such as level shifters, are installed on the motherboard. Hence, the daughterboards will be always the same for the different projects and only the motherboard will be changed if needed. Institut d'Estudis Espacials de Catalunya

System Overview - Radiation
High-performance on-board computer, data handling and SDR platform for cubesats System Overview - Radiation Platform not advanced enough (yet) to make in-depth studies about its radiation tolerance, but modern COTS have some advantages: Lower voltage level: more difficult to suffer of latch-up. If it’s low enough, device can even be considered immune. Lower gate size: may allow withstanding higher TID. Increased processing capabilities and reduced consumption. Just general rules! All components need testing to the mission requirements level. But in general, in LEO missions: only SEU and SEL are an issue. All the components of this platform are commercial. This has advantage with regards to radiation hardened devices, such as a larger processing capability, a lower power consumption and they are much more cheaper. But, since this platform is intended for LEO missions, radiation is an issue we need to consider. But, modern commercial components may have some advantages also in this sense due to the lower voltage level, which make them more latch-up resistant; and lower gate size which allow them withstanding higher total ionizing doses. But these only means they may be radiation tolerant, we still need to test them to verify which is they real tolerance. Still we must also remember that this platform is intended for LEO mission, which still have some atmosphere above them and they mission lifetime is generally below 2 years. Institut d'Estudis Espacials de Catalunya

On-Board Computer (OBC)
High-performance on-board computer, data handling and SDR platform for cubesats On-Board Computer (OBC) Main hardware elements of OBC: STM32F446RE microcontroller, based on ARM® Cortex®-M4 32-bit RISC up to 180 MHz, with DSP and FPU and 512 Kbytes Flash. MCU provides I2C, SPI, USART and CAN interface. Inertial Motion Unit (IMU) from Bosch, with 9 degrees of freedom (accelerometer, gyroscope and magnetometer). Ultra-low power RF transceiver from On Semi, at 434 MHz ISM band, allowing simultaneous reception + transmission. Microcontroller runs a Real Time Operating System (RTOS) based on FreeRTOS. Software inherits subset of Lisa Pathfinder software services and methodologies, allowing with this a direct ESA standards adoption. Software architecture implemented: enables to build the same application for several hardware platforms and operating systems. The OBC core element is the STM32, based on an ARM Cortex-M4 that can go to a frequency up to 180 MHz and include a DSP and FPU. It also provide standard interfaces like I-squared-C, SPI, USART and CAN. The board has also a Inertial Motion Unit with a 3-axis accelerometer, 3-axis gyroscope and 3-axis magnetometer. And we also added a ultra-low power RF transceiver working on 434 MHz band that allows simultaneous reception and transmission. This link to ground has a low bandwidth and is intended to be use only for telemetry and telecommand while the link provided by the SDR will have a much larger bandwidth and hence is intended for the processing results. The microcontroller runs a RTOS based on FreeRTOS. The software running inside inherits the services and methodologies from LISA Pathfinder. Institut d'Estudis Espacials de Catalunya

Software Defined Radio (SDR)
High-performance on-board computer, data handling and SDR platform for cubesats Software Defined Radio (SDR) Based on AD9361. 6 receiver inputs, 2 simultaneous. 4 transmitter outputs, 2 simultaneous. Fully configurable through SPI interfaces. 12 LVDS RX/TX data lines with up to 240 MHz clock. RX/TX channels optimized for usage in: 434 MHz ISM band 2.45 GHz ISM band Wide range: 70 MHz – 6 GHz Papers about radiation effects on the device: No SEL up to an LET of 52 MeVcm2/mg SEE without permanent damage, solved with power cycling and reconfiguring The SDR is based on the AD9361 device. It has 6 receiver inputs, from which two can be simultaneously sampled; it has 4 transmitter outputs from which two can also be simultaneosly used. Its fully configurable throught the SPI interface and has 12 LVDS lines for the data transmission. We decided to optimize this RF inputs and outputs to different frequency range, which are the 434 MHz band, the 2.4 to 2.5 GHz band and a wide range input or output from 70 MHz to 6 Ghz. There are some papers about the radiation effects on this device, altought not so much as we would like. They report that it has a good SEL resistance and that, even if some Single Event Effects appered on the device, all of them where solved with power cycling and reconfiguration. SEU may be detected at higher level software layers. linear energy transfer (LET) is the amount of energy that an ionizing particle transfers to the material traversed per unit distance 10 MeV·cm²/mg Cosmic ray ions, trapped protons, solar flare protons MeV·cm²/mg Cosmic ray ions > 100 MeV·cm²/mg No analysis required AD9364: degradation level at > 50 Krad(Si) Institut d'Estudis Espacials de Catalunya

On-Board Data Handling (OBDH)
High-performance on-board computer, data handling and SDR platform for cubesats On-Board Data Handling (OBDH) Based on Zynq Ultrascale+ XCZU4CG-2LE-I (low power, industrial temperature range). 2 ARM Cortex-A53 up to 1.5 GHz for computing 2 ARM Cortex-R5 up to 600 MHz for Real-Time. 1 GB of DDR with EDAC. External PS interfaces: I2C, SPI, CAN, RS-485, UART The OBDH is based on a Zynq Ultrascale+ device. Specifically we selected the 4CG low power and industrial temperature range device. This SOC has two ARM Cortex-A53 running up to 1.5 GHz. They run a linux OS with the same software approach and LPF heritage than the OBC. It also has two ARM Cortex-R5 that can go up to 600 MHz and intended for Real-Time applications. And we added on the board 1GB of DDR4 RAM with Error Detection and Correction. The external interfaces we plan to use are the I-squared-C, SPI, CAN, RS-485 and UART. Extended: 0 – 100ºC; Industrial -40 – 100ºC Institut d'Estudis Espacials de Catalunya

On-Board Data Handling (OBDH)
High-performance on-board computer, data handling and SDR platform for cubesats On-Board Data Handling (OBDH) I/O pins allow implementing any required custom interface at the PL. High number of Programable Logic resources: Although leakage current in these devices is higher, dynamic power consumption is significantly lower for the same frequency-resource usage. Resource XCZU4CG XCZU5CG Z7030 Virtex-5QV System Logic Cells (K) 192 256 125 131 Memory (Mb) 18.5 23.1 9.3 10 DSP Slices 728 1248 400 320 Nominal VCCINT (V) 0.72 1.00 Since we have also a programmable logic area, any other custom interface that may be needed to implement to communicate with the payload may be implemented here. This device has a large number of programable logic resources. To compare on this table we have also the Z7030, which is used in some currently commercial available platforms and the Virtex-5 space grade device. Also, even if our baseline is the 4CG device, the 5CG device is pin to pin compatible with the 4CG. Hence, if more processing power is needed we can exchange the parts without any other hardware change. As we can see the resources we have available on this device doubles the amount available at the other devices. It is also worth to mention that this devices core voltage is only 0.72 V, much lower than the 1 V of the others. This means that for the same amount of used resources the dynamic power consumption will be much lower. 𝑃= 𝑉 𝐶𝐶 ∗ 𝐼 𝑙𝑒𝑎𝑘𝑎𝑔𝑒 +𝐶∗ 𝑁 𝑠𝑤𝑖𝑡𝑐ℎ𝑖𝑛𝑔 ∗𝑓∗ 𝑉 𝐶𝐶 2 Institut d'Estudis Espacials de Catalunya

Xilinx Ultrascale+ Single Event Latch-up
High-performance on-board computer, data handling and SDR platform for cubesats Xilinx Ultrascale+ Single Event Latch-up Large interest from NASA and the space community in general regarding radiation tolerance of this devices, much work still on-going. Single Event Latch-up is less likely to occur with lower core voltage (less than 0.7 V can be considered immune [1]). We expect Xilinx Ultrascale+ low power SoC, with a 0.72 V core voltage, will be very immune. [2] reports for Zynq UltraScale+ MPSoC XCZU9EG: with LET of ~10 MeV/cm2/mg no SEL was observed. NASA Electronic Parts and Packaging (NEPP) has on-going test. Preliminary tests didn’t report any latch-up. All the different power supplies are independently controlled and have over-current protection  in case of such an event the device will be shutdown. There is a large interest at NASA, and the space community in general regarding the radiation tolerance of this device, but most work is still on-going. For the single event latch-up, since it’s core voltage is very low, only 0.72 V, it can be considered very resitant. Moreover if we consider, as does some papers, that a device with a core voltage of 0.7 V can be considered immune. The first preliminary test that can be found for some devices of the Ultrascale+ family seem to agree with it. NASA’s Electronic Parts and Packaging group has some on-going tests and the preliminary test didn’t report any latch-up. Even so, all the different power supplies are continuously monitored and have over-current protection, hence in a latch-up event the device will be automatically shutdown. [1] Sinclair, D., & Dyer, J. (2013). Radiation effects and COTS parts in SmallSats. [2] D. M. Hiemstra, V. Kirischian and J. Brelski, "Single Event Upset Characterization of the Zynq UltraScale+ MPSoC Using Proton Irradiation," 2017 IEEE Radiation Effects Data Workshop (REDW), New Orleans, LA, 2017, pp. 1-4. Institut d'Estudis Espacials de Catalunya

Xilinx Ultrascale+ Single Event Upset
High-performance on-board computer, data handling and SDR platform for cubesats Xilinx Ultrascale+ Single Event Upset Single events upset (SEU) may happen in this device. Configuration stored in SRAM  it may affect the configuration (SEFI). Xilinx reports that with 20 nm finFETs and some layout improvements, incidence should be lower than for other devices (smaller cross-section with same Qcrit). For the Single Events Upsets, at some point most probably some may happen. Even more, since the configuration of the device is stored in SRAM, it may affect the configuration producing a single-event functional interrupt. But Xilinx reports that with the 20nm finFETs of this device and some layout improvements they have made, the incidence should be 6 times lower than for previous devices. This is mostly due the smaller cross-section of the transistor while the charge needed for the SEU has been keep the same than for previous devices. single-event functional interrupt (SEFI) change the state of a storage element (QCRIT) “UltraScale Devices Maximize Design Integrity with Industry-Leading SEU Resilience and Mitigation” WP462, “UltraScale Devices Maximize Design Integrity with Industry-Leading SEU Resilience and Mitigation”, 2015 Xilinx Institut d'Estudis Espacials de Catalunya

Xilinx Ultrascale+ Single Event Upset
High-performance on-board computer, data handling and SDR platform for cubesats Xilinx Ultrascale+ Single Event Upset To correct this kind of errors, Xilinx Ultrascale+ includes: Enhanced ECC embedded in each configuration frame, enabling up to 8-bit error detection and 4-bit error correction per frame. Plus, 32-bit CRC calculated for the entire device configuration RAM, reliably detecting up to 31 randomized bit errors. Execution-related SEU effects: Soft Error Mitigation (SEM) IP freely available to customers  Enhanced correction capabilities, essential bits monitoring and fault injection for validation. User may use other techniques, like Triple Module Redundancy (TMR), to further enhance the SEU protection. Xilinx also provides a tool, SEU FIT rate calculator, to get an estimation of the impact on our system of SEU. To correct the configuration errors, the Xilinx Ultrascale+ devices include an enhanced ECC embedded in each configuration frame, enabling up to 8-bit error detection and 4-bit error correction per frame; and a 32-bit CRC calculated for the entire device configuration RAM, reliably detecting up to 31 randomized bit errors. For execution related SEU, Xilinx provides a freely available Soft Error Mitigation IP, which has enhanced correction capabilities, essential bits monitoring and allows fault injection for validation purposes. Even so, users should use other techniques, like TMR, for further enhance SEU protection. Finally, Xilinx also provides a tool a SEU FIT rate calculator to get an estimation of the impact on the system of a SEU. FIT=Failure in Time is the occurrence of a single failure in 10^9 hours of device operation. Configuration frame size: bit words Institut d'Estudis Espacials de Catalunya

Future use cases Image processing (study about adding a commercial camera on-going) EMI scanner to detect spoofing (ESA safety application) GNSS signal processing, both for navigation and science (i.e. ionosphere monitoring, radio occultation) -> (late) solar flares detection Any mission which requires fully autonomous massive data processing. Afterwards, only end-results, which require lower data rate, are downloaded. The future uses cases we have planned and some for which we have done some proposals are: image processing, we are currently studying which commercial camera we want to add; electromagnetic interference scanner to detect spoofing, this comes from an ESA safety application; GNSS signal processing, both for navigation usage and for science, for example ionosphere monitoring; and finally any mission which may collect a huge amount a raw data, which may not be feasible to be downloaded to ground due to the limited bandwidth. In this case the processing may be done on-board and only the lower data rate results will be downloaded. Institut d'Estudis Espacials de Catalunya

Conclusions New platform unprecedent performance capabilities
High-performance on-board computer, data handling and SDR platform for cubesats Conclusions New platform unprecedent performance capabilities keeping power consumption in the range of typ. 3U cubesat missions Extremely modular solution allows adoption for different missions keeping number of required changes low SDR + high number of programmable logic resources  allow implementing all changes in software, keeping hardware heritage intact. Lot of work still pending, specially on radiation validation but: test campaigns by other agencies and institutes make us confident that we may be on the safe side at least for LEO missions. This solution will push the cubesat concept to its limits, allowing to achieve performances for which larger-sized missions would be required otherwise. Institut d'Estudis Espacials de Catalunya

Thanks for you attention!
High-performance on-board computer, data handling and SDR platform for cubesats Thanks for you attention! Questions? Built upon the successful expertise of LISA Pathfinder, the 3Cat series cubesats (from UPC NanoSat Lab), Solar Orbiter and Gaia, the Institute for Space Studies of Catalonia (IEEC) is designing and implementing a high-performance platform for cubesats. It provides a robust on-board computer to control the spacecraft state and telecommands, a versatile software-defined radio providing high-speed downlink capabilities, a powerful on-board data handling system, and an efficient on-ground telecommand and basic data handling framework. This solution will push the cubesat concept to its limits, allowing to achieve performances for which larger-sized missions would be required otherwise. We present the overall features of this platform, its capabilities, and some possible use cases. This work has been funded by the the Agència de Gesió d’Ajusts Universitaris i de Recerca of the Generalitat de Catalunya through project 2016 PROD 00076, including a percentage from European FEDER funds. Institut d'Estudis Espacials de Catalunya

Radiation annual dose Source: E.J. Daly, A. Hilgers, G. Drolshagen, and H.D.R. Evans, "Space Environment Analysis: Experience and Trends," ESA 1996 Symposium on Environment Modelling for Space-based Applications, Sept , 1996, ESTEC, Noordwijk, The Netherlands Institut d'Estudis Espacials de Catalunya

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