1. Semiconductor Industry:
Increasing Miniaturization (Moore’s “Law”)
is Leading to Nanoelectronics

2. ◄

3. Source: Quantum Computing. 2004
Source: Quantum Computing A Short Course from Theory to Experiment. Joachim Stoltze and Dieter Stuter.

4. Moore’s “Law”
Why would we need nanotechnology in the first place? Doesn’t Moore’s law supply all the ingredients we need?
(Notice the logarithmic scale on the graphs.)
Yes, assuming it will sustain the same rate of growth. Although its demise based on technical grounds has been repeatedly predicted, it never happened.
The number of transistors that can be fabricated on a silicon integrated circuit & therefore the computing speed of such a circuit, is doubling every 18 to 24 months. After four decades, solid-state microelectronics has advanced to the point at which 100 million transistors, with feature size measuring 180 nm can be put onto a few square centimeters of silicon.

5. Why would we need nanotechnology in the first place
Why would we need nanotechnology in the first place? Doesn’t Moore’s law supply all the ingredients we need?
(Notice the logarithmic scale on the graphs.)
Yes, assuming it will sustain the same rate of growth. Although its demise based on technical grounds has been repeatedly predicted, it never happened.

6. Silicon and Moore’s Law
Heat dissipation.
At present, a state-of-the-art 500 MHz microprocessor with 10 million transistors emits almost 100 watts, more heat than a stove-top cooking surface.
Leakage from one device to another.
The band structure in silicon provides a wide range of allowable electron energies. Some electrons can gain sufficient energy to hop from one device to another, especially when they are closely packed.
Capacitive coupling between components.
Fabrication methods (Photolithography).
Device size is limited by diffraction to about one half the wavelength of the light used in the lithographic process.
‘Silicon Wall.’
At 50 nm and smaller it is not possible to dope silicon uniformly. (This is the end of the line for bulk behavior.)

7. Moore’s “Second Law" Plant cost Mask cost X 1000$ generation
This is the lesser known Moore’s second law, depicting the cost of fabrication plants for chips; notice the non-logarithmic scale and the exponential curve, matched well by the data.
This cost comes mainly from the cost of the very precise mechanical systems needed, which, unlike lithography, doesn’t scale well with size.
The cost of chip masks parallels this shape; these cannot be shared, unlike a plant.
Very soon no company will afford a (risky) investment of this size.
generation
Plant cost
Mask cost

8. Moore’s second law.
Continued exponential decrease in silicon device size is achieved by exponential increase in financial investment. $200 billion for a fabrication facility by 2015.
Transistor densities achievable under the present and foreseeable silicon format are not sufficient to allow microprocessors to do the things imagined for them.