Presentation is loading. Please wait.

Presentation is loading. Please wait.

16 ( incl. 2x diff. pairs 2V5 LVDS )

Published byAugustus Henderson Modified over 5 years ago

Similar presentations

Presentation on theme: "16 ( incl. 2x diff. pairs 2V5 LVDS )"— Presentation transcript:

1 16 ( incl. 2x diff. pairs 2V5 LVDS )
3x LEDs NIM ECL 12x LEDs 3 SHIFT REG. 2 CLKIN0 IN0 IN2 IN6 IN4 CLKIN1 CLKOUT0 OUT0 OUT2 OUT6 OUT4 CLKOUT1 SW 8 TTL HEX SELECT 16-pin AUX. CONNECTOR USB J-TAG X-TAL MHz MPX PLL :2 40/80MHz select CLK Master DELAY 4x Slave DELAYS 4 CLKIN select FPGA & PROM 16 6 16 ( incl. 2x diff. pairs 2V5 LVDS ) SERIAL NO. MOD. RECORD 24 40-pin DIL BREAK-OUT HEADER (incl. 4x diff. pairs 2V5 LVDS ) 6x POWER 2x GND pins 32 EXT V IN FUSES +3V3 +2V5 +1V8 +1V2 -5V -2V 6x DC-DC VME J1 J2 +5V Buffers VME BASE ADDRESS A<31-24> 22 Data 4Mbx18 SRAM Address MP-UCL, 18 August 2011 20x LEMO-00 All POWER Monitor 7 2x LEDs Xilinx Spartan3e XC3S1600E-5FGG400C 6x FUSES MCU

Download ppt "16 ( incl. 2x diff. pairs 2V5 LVDS )"

Similar presentations

Clock and Control Status Matt Warren, on behalf of Martin Postranecky.

Clock and Control Status Matt Warren, on behalf of Martin Postranecky.
XFEL 2D Pixel Clock and Control System Train Builder Meeting, DESY 18 February 2010 Martin Postranecky, Matt Warren, Matthew Wing.

XFEL 2D Pixel Clock and Control System Train Builder Meeting, DESY 18 February 2010 Martin Postranecky, Matt Warren, Matthew Wing.
4x4 4 8x LVDS on HDMI ( 8x LVDS on SMA ? ) 8x LVDS on HDMI LVDS on SMA LVTTL on Lemo NIM on Lemo LVDS on SMA 4x LVDS on SMA 4x NIM on Lemo 2x NIM on Lemo.

4x4 4 8x LVDS on HDMI ( 8x LVDS on SMA ? ) 8x LVDS on HDMI LVDS on SMA LVTTL on Lemo NIM on Lemo LVDS on SMA 4x LVDS on SMA 4x NIM on Lemo 2x NIM on Lemo.
A-C Coupler U14+U15 XFEL C-C Test Daughter Card-B, BLOCK DIAGRAM-1. MP-UCL, 31-08-2010 RJ45 2121 5454 8787 J1 0R Shield IDC-1/A RJ45 2121 5454 8787 6363.

A-C Coupler U14+U15 XFEL C-C Test Daughter Card-B, BLOCK DIAGRAM-1. MP-UCL, RJ J1 0R Shield IDC-1/A RJ
New Corporate Identity Poster Design Cavendish Laboratory, Department of Physics, University of Cambridge Maurice Goodrick, Richard Shaw, Dave Robinson.

New Corporate Identity Poster Design Cavendish Laboratory, Department of Physics, University of Cambridge Maurice Goodrick, Richard Shaw, Dave Robinson.
The DAVE Card Status SCT has developed a new ATLAS trigger card “The card that no-one knew they needed, but now do” Introduction Concept & Motivation Functionality.

The DAVE Card Status SCT has developed a new ATLAS trigger card “The card that no-one knew they needed, but now do” Introduction Concept & Motivation Functionality.
New Corporate Identity Poster Design Department of Physics and Astronomy, University College London Erdem Motuk, Martin Postranecky, Matthew Warren, Matthew.

New Corporate Identity Poster Design Department of Physics and Astronomy, University College London Erdem Motuk, Martin Postranecky, Matthew Warren, Matthew.
SCT has developed a new ATLAS trigger card Introduction Concept & Motivation Functionality Overview Production Status ATLAS orders 03/05/20111Dave Robinson.

SCT has developed a new ATLAS trigger card Introduction Concept & Motivation Functionality Overview Production Status ATLAS orders 03/05/20111Dave Robinson.
Clock & Control Card Status 31 March 2009 Martin Postranecky / Matt Warren.

Clock & Control Card Status 31 March 2009 Martin Postranecky / Matt Warren.
ATCA LLP CARRIER BLOCK DIAGRAMS LAST UPDATE 09/05/2007.

ATCA LLP CARRIER BLOCK DIAGRAMS LAST UPDATE 09/05/2007.
Jan-01HERAB-FCS1 Hera-B Fast Control System G. Hochweller G. Delfs P. Gasiorek.

Jan-01HERAB-FCS1 Hera-B Fast Control System G. Hochweller G. Delfs P. Gasiorek.
M.J. LeVine1STAR HFT meeting, Sept 27-28, 2011 STAR SSD readout upgrade M. LeVine, R. Scheetz -- BNL Ch. Renard, S. Bouvier -- Subatech J. Thomas -- LBNL.

M.J. LeVine1STAR HFT meeting, Sept 27-28, 2011 STAR SSD readout upgrade M. LeVine, R. Scheetz -- BNL Ch. Renard, S. Bouvier -- Subatech J. Thomas -- LBNL.
DAQ for KEK beam test M.Yoshida (Osaka Univ.). Components VLPC readout –Stand Alone Sequencer (SASeq) Slow < 100Hz –Buffering VLPC data with VME interface.

DAQ for KEK beam test M.Yoshida (Osaka Univ.). Components VLPC readout –Stand Alone Sequencer (SASeq) Slow < 100Hz –Buffering VLPC data with VME interface.
Institute of Experimental and Applied Physics Czech Technical University in Prague 11th December 2007 Michal Platkevič RUIN Rapid Universal INterface for.

Institute of Experimental and Applied Physics Czech Technical University in Prague 11th December 2007 Michal Platkevič RUIN Rapid Universal INterface for.
Clock Distribution for IceCube June 8, 2004 Lawerence Berkeley National Laboratory Gerald Przybylski GTPrzybylski LBNL 10/13/2003.

Clock Distribution for IceCube June 8, 2004 Lawerence Berkeley National Laboratory Gerald Przybylski GTPrzybylski LBNL 10/13/2003.
7 th March 2007M. Noy. Imperial College London CALICE MAPS DAQ Project Summary.

7 th March 2007M. Noy. Imperial College London CALICE MAPS DAQ Project Summary.
Trigger Supervisor (TS) J. William Gu Data Acquisition Group 1.TS position in the system 2.First prototype TS 3.TS functions 4.TS test status.

Trigger Supervisor (TS) J. William Gu Data Acquisition Group 1.TS position in the system 2.First prototype TS 3.TS functions 4.TS test status.
The integrated Development of Embedded linux and SOC IP

The integrated Development of Embedded linux and SOC IP
F.F. - 18/07/2008 1 User Guide of the Input Trigger Multiplexer unit with input signal rate counters.

F.F. - 18/07/ User Guide of the Input Trigger Multiplexer unit with input signal rate counters.
28 June 2004 ATLAS SCT/Pixel TIM FDR/PRR Martin Postranecky: COSTS ESTIMATE1 ATLAS SCT/Pixel TIM FDR/PRR 28 June 2004 Physics & Astronomy HEP Electronics.

28 June 2004 ATLAS SCT/Pixel TIM FDR/PRR Martin Postranecky: COSTS ESTIMATE1 ATLAS SCT/Pixel TIM FDR/PRR 28 June 2004 Physics & Astronomy HEP Electronics.

Similar presentations

Ads by Google