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BIOS Chapter 6.

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Presentation on theme: "BIOS Chapter 6."— Presentation transcript:

1 BIOS Chapter 6

2 CPU Communication with the System
The CPU needs to communicate with all components of the computer system The Northbridge chip/circuitry controls the high speed communication channels RAM Video The Southbridge chip/circuitry controls the low speed communication channels. Input/Output Controller Hub (ICH) Keyboard USB Disk drives

3 BIOS Basic Input/Output Services
Contains programs to allow CPU to interact with the system before the operating system is loaded Stored in ROM ROM - Read Only Memory PROM - Programmable Read Only Memory EPROM - Erasable Programmable Read Only Memory EEPROM - Electrically Erasable Programmable Read Only Memory Flash ROM Firmware

4 CMOS Complementary Metal-Oxide Semiconductor
Holds data about connected devices to be used by the BIOS programs Also acts as the clock Modify CMOS Every computer has a system setup program that can be accessed at boot time

5 Tour through CMOS Setup Program
MB Intelligent Tweaker Can change the voltage and multiplier settings for the CPU Advanced BIOS Features Covers a variety of settings such as boot devices and order Virtualization Support Hardware support for a virtual machine Chassis Intrusion Detection Advanced Chipset Features

6 Tour through CMOS Setup Program
Integrated Peripherals Configure, enable, and disable onboard devices Power Management Setup Control how and when devices turn off and on to conserve power Overclocking PnP/PCI Configurations Rarely used Trusted Platform Module

7 Option ROM and Device Drivers
BIOS programs must be available for all devices attached to the computer system Option ROM ROM chip is on the device controller Device Drivers Software file Programs are loaded into RAM

8 Power On Self Test (POST)
The Beep Codes Text Errors Occur after video has passed its test POST Cards Expansion card used to read and display the POST codes Useful for “dead” systems

9 The Boot Process Power supply circuitry test for proper voltage then sends signal down “power good” wire to awaken the CPU CPU sends a built-in memory address across address bus which is the first line of the POST program in the system ROM Once the POST program is done, it passes control to the last BIOS function, the bootstrap loader The bootstrap loader reads the CMOS data to find the OS, bootable drives If a valid boot program is found in a boot sector, it is run; otherwise the next device is tried The OS is then loaded Preboot execution environment (PXE) allows for the retrieval of an OS over a network for booting

10 Care and Feeding of BIOS and CMOS
Losing CMOS Settings How do you know? CMOS configuration mismatch CMOS data/time not set No boot device available CMOS battery state low How did it happen? Pulling and inserting cards Touching the motherboard Faulty power supplies Electrical surges Dead battery Flashing ROM

11 UEFI Unified Extensible Firmware Interface Replaces BIOS
UEFI support 32-bit or 64-bit booting UEFI handles all boot-loading duties UEFI is not dependent on x86 firmware


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