1. Dr Renato Turchetta Instrumentation Department CMOS Monolithic Active Pixel Sensors (MAPS) for the ILC

2. RAL, 16/2/2005 2 Outline Introduction on MAPS MAPS for Particle Physics Parametric test sensors RAL_HEPAPS Source results Irradiation results Flexible APS (FAPS) for ILC. Concept and source results MAPS for ILC

3. RAL, 16/2/2005 3 CMOS (Monolithic) Active Pixel Sensor (MAPS) Standard CMOS technology all-in-one detector-connection- readout = Monolithic small size / greater integration low power consumption radiation resistance system-level cost Increased functionality increased speed (column- or pixel- parallel processing) random access (Region-of-Interest ROI readout) Column-parallel ADCs Data processing / Output stage Readout control I2C control (Re)-invented at the beginning of 90s: JPL, IMEC, …

4. RAL, 16/2/2005 4 CMOS sensors: camera architecture Column-parallel ADCs Data processing / Output stage Column-parallel ADCs Data processing / Output stage Camera control Rolling shutter Snapshot Integration (exposure) and readout are interleaved Integration time given by time between two readouts Simultaneous integration for all pixels, followed by the readout Camera control

5. RAL, 16/2/2005 5 Metal layers Polysilicon P-WellN-WellP-Well N+ P+N+ CMOS for 100% efficient detection of charged particles Dielectric for insulation and passivation Radiation - - - - - - -+ + + + + + + -+ -+ -+ P-substrate P- epitaxial layer Potential barriers Concept first proposed in 1999, and published in NIM in 2001 (R. Turchetta et al.)

6. RAL, 16/2/2005 6 MAPS for Particle Physics and Space Science 2-year PPARC (PPRP) funded programme to develop the underpinning technology. Started June 2003. Total funding of £300k over 2 years. 5 institutes: University of Liverpool HEP University of Glasgow HEP University of Leicester SS University of Birmingham SS CCLRC-RAL with 3 departments: Instrumentation, Space Science and Particle Physics 4 axes. 1)Pixel architecture: noise, analogue memory, data sparsification 2)Radiation resistance 3)Backthinning: for EUV detection and minimise material for HEP 4)Large area sensor

7. RAL, 16/2/2005 7 Basic Technology MI-3 consortium Consortium of 11 institutes http://mi3.shef.ac.uk.http://mi3.shef.ac.uk Goal: underpinning technology. University of Sheffield (Department of Electrical and Electronic Engineering) University of Liverpool (Semiconductor Detector Center) University of Liverpool (Lab. For Environmental Gene Regulation) University of Glasgow (Particle Physics Experimental Group) University of Brunel (Imaging for Space and Applications) University College, London (Radiation Physics) Institute for Cancer Research (Royal Marsden Hospital) University of Surrey (Centre for Vision, Speech and Signal Processing) University of York (Applied Electromagnetical and Electron Optics Research Group) MRC Laboratoy of Molecular Biology CCLRC-RAL (EID, PPD, SSTD) Started 7/04 end 7/08

8. RAL, 16/2/2005 8 RAL_HEPAPS family. Sensors for Particle Physics SensorsYearN. pixelPitch ( m) Epi layer ( m) Technology HEPAPS120018*64=0.5K1520.25 IBM HEPAPS22003384*192=73K158 0.25 TSMC CIS (0.35 in pixel) HEPAPS32004192*192=36K15No 0.25 TSMC MM-RF (0.35 in pixel) HEPAPS420051024*384=300K15>100.35 AMS OPTO

9. RAL, 16/2/2005 9 RAL_HEPAPS 2 Parametric test sensor 4 pixel types –3MOS –4MOS –CPA (charge amp) –FAPS (10 deep pipeline) Row decoder/control 3MOS des. A 3MOS des. B 3MOS des. C 3MOS des. D 3MOS des. E 3MOS des. F 4MOS des. A 4MOS des. B 4MOS des. C 4MOS des. D 4MOS des. E 4MOS des. F CPA des. A CPA des. B CPA des. C CPA des. D FAPS des. A FAPS des. B FAPS des. C FAPS des. D FAPS des. E Columnamplifiers Column decoder/control 3MOS & 4MOS: six different design each of 64x64 pixels at 64x64, 15 m pitch, 8 m epi-layer MIP signal ~600 e-

10. RAL, 16/2/2005 10 Soft and hard reset RESET ROW_SELECT Output Diode Reset (or kTC) noise is generally the dominant noise source Vreset Hard reset RESET – Vreset > Vth for reset transistor Noise (ENC in e- rms) Soft reset RESET ~ Vreset. A factor of ~2 reduction noise < 20 e- rms Noise (ENC in e- rms) Measured noise distributions for a 64x64 pixel test structure. Not corrected for system noise

11. RAL, 16/2/2005 11 HEPAPS2: Some Clusters Number of pixels in a 3x3 cluster Cluster in S/N Source (Ru106) test results. Test made in Liverpool.

12. RAL, 16/2/2005 12 HEPAPS2: Landau distributions

13. RAL, 16/2/2005 13 RAL_HEPAPS2 3&4 MOS summary All 12 substructures are working. 2 had initial problems in fabrication, and no time yet to test them with MIPs. The 3 structures with 4MOS-GAA have S/N too low for efficient use for MIP detection. All the 7 others display good S/N for MIP detection. Test beam just finished (results now to be analysed): –Seed cut determines S/N result –Efficiency, global and as a function of impact point TypeSpecsSNS/N 3MOS E4 diodes99±14.94±0.0220.1 ±0.3 3MOS CGAA87±24.85±0.0218.0 ±0.4 3MOS BDiode 1.2x1.292±13.87±0.0123.8 ±0.2 3MOS ADiode 3x367±13.31±0.0120.3 ±0.3 4MOS CLower V T 101±24.14±0.0224.4 ±0.4 4MOS BHigher V T 114±24.70±0.0224.2 ±0.4 4MOS AReference111±24.45±0.0225.0 ±0.4 8 m epi layer

14. RAL, 16/2/2005 14 Radiation test. Source results Noise seems to increase slightly with dose. Signal decreases with dose. 3MOSA 3x3 m 2 3MOSB 1.2x1.2 m 2 3MOSCGAA 3MOSE4 diodes 4MOSAReference 4MOSBHigher V T 4MOSCLower V T J. Velthuis (Liv)

15. RAL, 16/2/2005 15 S/N dependence on impact point. 10 15 No rad 10 14 No rad 4-diode 15 m pixel G. Villani (RAL-PPD)

16. RAL, 16/2/2005 16 Radiation test. Summary Sensors yield reasonable S/N up to 10 14 p/cm 2 (device simulation confirms) –No efficiency measurement; need testbeam data 0.35 m technology in the pixel transistors. Enclosed layout in 3MOS_C Especially 3MOS_E (4 diodes) looks interesting –Larger capacitance yields larger noise –Four diodes: less dependence of S/N on impact point –After irradiation remains a larger sensitive area ! - + + J. Velthuis (Liv)

17. RAL, 16/2/2005 17 Flexible Active Pixel Sensor 10 memory cell per pixel 28 transistors per pixel 20 m pitch 40x40 arrays Design for the Vertex detector at the International Linear Collider Pulses LED test Light pulse Amplitude Time

18. RAL, 16/2/2005 CMOS sensors for the linear collider 50 mm Readout direction Red line: control electronics (sampling and readout). Minimal space. Red rectangle: readout electronics (column amplifiers + ADC + sparsifying circuit) Either on same substrate or bump-bonded to sensor substrate Ladder with 1 (2) sensor(s) Sensor size: 100 mm *13 mm, read out at both sides Number of pixels per sensor: 2500 x 650 In each pixel: 20 samples For ILC: sample at 50 s during beam-on periods and store 20 samples in the pixel Column parallel readout between trains on multiple lines @ 1 MHz a few ms read-out time 50 mm 13 mm Minimize budget material in the central area Keep power dissipation evenly spread and low Keep sensor architecture simple and adaptable to machine choice Simplify system design Guidelines

19. RAL, 16/2/2005 19 FAPS source test Correlated Double Sampling readout (subtract S cell 1 ) Correct remaining common mode and pedestal Calculate random noise –Sigma of pedestal and common mode corrected output Cluster definition –Signal >8 seed –Signal >2 next Note hit in cell i also present in cell i+1. S/N cell between 14.7±0.4 and 17.0±0.3 Seed3x35x5 J. Velthuis (Liv)

20. RAL, 16/2/2005 20 FAPS Hit resolution Take hits found in cell 2 Reconstruct x and y each cell using Centre-of-Gravity Calculate average hit position Determine residual position for each memory cell Hit resolution approximately 1.3 m Hit Resolution spatial resolution!!! J. Velthuis (Liv)

21. RAL, 16/2/2005 21 FAPS efficiency estimate Find hits in all cells Plot max S/N pixel in 3x3 area around expected hit position if hit not found Define: Clearly, strongly dependent on seed cut. Lowering seed cut to 5 yields inefficiency ranging between 0.08±0.08% and 0.5±0.1% J. Velthuis (Liv)

22. RAL, 16/2/2005 22 MAPS plan Design: Phase 1: dedicated run with several test structure for FAPS: simulation and test results to analyse effects of storage cell size, numbers, read-out speed Phase 2: non-stitched 2 cm x 2 cm uniform sensor Phase 3: full size, stitched layer 1 sensor Mechanical mounting: CVD diamond Readout ASIC. Alignment to CCD/ISIS readout cost saving Explore possibility of sharing technology (ISIS, readout circuit) cost saving.

23. RAL, 16/2/2005 23 MAPS under LCFI Groups involved: Liverpool, Glasgow, RAL-EID, RAL-PPD (?) 3 runs to XFAB ~ £200k ( Jazz025 ?) CVD diamond ~£40k PCB ~ £20k DAQ ~ £10k Design effort (RAL EID): about 3.8 SY. Cost £250k (to be discussed within MI-3) Technician in Liverpool (50% over 5 years): £75k Some effort from RA already requested within LCFI RAs from rolling grants in Liverpool and Glasgow Total cost: ~£600-700k