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TENCON’2012 (PROM3D) Parameterized Path-Based, Randomized, Oblivious, Minimal Routing in 3D Mesh NoC Dr. Mushtaq Ahmed Email : Good.

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Presentation on theme: "TENCON’2012 (PROM3D) Parameterized Path-Based, Randomized, Oblivious, Minimal Routing in 3D Mesh NoC Dr. Mushtaq Ahmed Email : Good."— Presentation transcript:

1 TENCON’2012 (PROM3D) Parameterized Path-Based, Randomized, Oblivious, Minimal Routing in 3D Mesh NoC Dr. Mushtaq Ahmed Good morning to the session chair and delegates. This is my pleasure to present our work on Parameterized Path-Based, Randomized, Oblivious, Minimal Routing in 3D Mesh NoC Co-author : Rakesh kumar Department f Computer Engineering Malaviya National Institute of Technology, Jaipur India

2 Presentation layout Network on Chip
Adaptive Routing for Multiport 3D Mesh NoC PROM3D Routing for 3D NoC Experimental setup Results Conclusions

3 Why Network on Chip ? Transistor scaling is increased
Millions of gates Multicore architecture Conventional bus techniques is not suitable Require better approach i.e. Network on Chip Tilera :TILE-Gx100 ™, 100 tilesMESH, freq 1.5GHz 45x45mm

4 Network on Chip Network-on-a-Chip (NoC) is a new paradigm for System-on-Chip (SoC) design NoC consist of: Processing Elements (PE) An architecture or topology Number of Switches Network Interfaces Routing technique with an addressing system Communication Protocol for message passing

5 NoC Architectures ■ Variants of NoC architecture
Torus Spidergon Mesh Honeycomb Hexagonal 2D Mesh 3D Mesh ■ Variants of NoC architecture - Torus, Mesh, Spidergom, honeycomb, diagonalised, Hexagon Usability depend on application and performance requirement Proper configuration is required for simulation. ■ Routing technique and performance capability: -Can vary among topology - Target is optimization of efficiency throughput, latency, area, gitter, power

6 Routing algorithms Deterministic vs. Adaptive
Simplify/Complicate routing logic Easy/Uneasy deadlock free Prone/Robust to congestion Examples Deterministic routing (XYZ, ZXY) Partial adaptive routing (WSF, NG, NUL, OE)

7 Routing in NoC Provide the path from source to destination
Two broad categories Deterministic and Adaptive Deterministic routing generated packets P from a source node S always uses uniquely determined path for bound between source and destination pair ( XYZ routing) Partial adaptive routing is flexible and allows to choose multiple nodes for exploring the different route for the packets generated form source destined towards reciver ( West South First, North Up Last, Negative First)

8 XYZ Routing Route a packet in rows first, then moves along the columns and then move along the slices toward destination

9 Negative First Route a packet first adaptively west,
south, and down and then adaptively east, north, and up.

10 West South First Route a packet first adaptively west
and south and then adaptively down, east, north, and up.

11 North Up Last Route a packet first adaptively west,
south, down, and east and then adaptively north and up.

12 PROM 3D Routing The f parameter is required in parameterized PROM 3D
Let ∆x = |Dx – Cx|, ∆ y = |Dy – Cy| and ∆ z = |Dz – Cz| Minimum rectangle is (∆ x +1)(∆ y +1) (∆ z +1) Overall rectangle size will be Num(rows) xNum(cols) xNum(slices).

13 PROM 3D Routing Rules First, boundary regions are defined
Parameter f (max) is selected. Packets are pushed toward intermediary nodes using priority functions.

14 PROM 3D Routing: Example
Let 4*4*4 Mesh and f max =1 Source S1(1; 1; 1) and Destination D1(3; 3; 3) f = 1* (3*3*3)/(4*4*4) = 0.42 Source node Probabilities are P1= (2+0.42)/ ( ) P2= (2+0.42)/ ( ) P3= (2+0.42)/ ( ) P1= 0.33, P2= 0.33 and P3=0.33 Let us assume moves in x- direction at intermediate node (2; 1; 1) where, x=1, y=2 and z=2

15 PROM 3D Routing: Example
At intermediate node (2; 1; 1) P1= (1+0.42)/ ( ) P2= 2/ ( ) P3= 2/ ( ) P1= 0.22, P2= 0.31 and P3=0.31 Here, P2 = P3 and (P2, P3 > P1). any path among P2 or P3 can be chosen. Let it is y-ingress, i.e., y direction for intermediate node (2; 2; 1) where P1=0.19, P2=0.26 and P3=0.38 Path from node (2; 2; 1) to node (2; 2; 2) will be selected

16 PROM 3D Routing: Example
At intermediate node (2; 2; 2) P1=0.23, P2=0.23 and P3=0.33. Here, P3 is higher and (P3 > P1,P2). Path from (2; 2; 2) to node (2; 2; 3) is selected. Again probability at node (2; 2; 3) is to be calculated as P1=0.30, P2=0.30 and P3=0.12 where, P1 = P2 and (P1, P2 > P3). At intermediate node (3; 2; 3) P1=0.18, P2=0.44 and P3=0. P2 is highest and path from node (3; 2; 3) to node (3; 3; 3) is selected.

17 PROM 3D Routing: Example
Parameters used Values Mesh Size 4 * 4 * 4 Packet size 20 Buffer size 8 Flit size 4 Virtual channels 2 Simulation cycles 10000 Test gen. number 2000 Traffic patterns Random and Transpose Packet injection Bursty Data with Burst length 4 and interval of 3 Load in % 5 to 50 with 5% increasing steps No. of simulations 10 times for each routing algo. With different load and traffic pattern

18 Simulation Results Latency under different values of fmax for random traffic with Bursty data.

19 Simulation Results Latency under different values of fmax for Transpose traffic with Bursty data.

20 Simulation Results Latency of XYZ, NUL, WSF, NF and PROM3D under Random traffic with Bursty data.

21 Simulation Results Latency of XYZ, NUL, WSF, NF and PROM3D under Transpose traffic with Bursty data.

22 Conclusions Results are reasonable and comparable to existing DOR routing and turn model routing algorithms, as it always tries to explore minimal path. Parameterized PROM3D routing can handle congestion and performs better when fmax parameter is chosen wisely. With the higher percentage of offered load, average latency in PROM3D under random and transpose traffic is observed better, i.e., lower than other routing algorithms, as it tries to follow allowable turns within cuboid of region of interest.

23 References [1] M.O. Agyeman and A. Ahmadinia. “An adaptive router architecture for heterogeneous 3d networks-on-chip”. In NORCHIP, 2011, pages 1 –4, nov [2] Mushtaq Ahmed, V. Laxmi, and M.S. Gaur. “Performance analysis of minimal path fault tolerant routing in noc”. Journal of Electronics (China), 28:587–595, [3] S. Akbari, A. Shafiee, M. Fathy, and R. Berangi. “Afra: A low cost high performance reliable routing for 3d mesh nocs”. In Design, Automation Test in Europe Conference Exhibition (DATE), 2012, pages 332 –337, march [4] F. Dubois, A. Sheibanyrad, F. Petrot, and M. Bahmani. “Elevator- first: a deadlock-free distributed routing algorithm for vertically partially connected 3d-nocs”. Computers, IEEE Transactions on, PP(99):1, 2011.

24 References [5] M. Ebrahimi, M. Daneshtalab, P. Liljeberg, and H. Tenhunen. “Performance evaluation of unicast and multicast communication in threedimensional mesh architectures”. In Computer Architecture and Digital Systems (CADS), th CSI International Symposium on, pages 161 –162, sept [6] C. J. Glass. “Adaptive routing in mesh-connected networks”. In IEEE Trans, pages 12–19, [7] Yuan-Long Jeang, Tzuu-Shaang Wey, Hung-Yu Wang, Chung-Wei Hung, and Ji-Hong Liu. “An adaptive routing algorithm for mesh- tree architecture in network-on-chip designs”. In Innovative Computing Information and Control, ICICIC ’08. 3rd International Conference on, page 182, june 2008.

25 References [8] M. Kamali, L. Petre, K. Sere, and M. Daneshtalab. “Formal modeling of multicast communication in 3d nocs”. In Digital System Design (DSD), th Euromicro Conference on, pages 634 –642, sept [9] Jain L., Al-Hashimi B., M.S.Gaur, Laxmi V., and Narayanan A. “Nirgam: A simulator for noc interconnect routing and application modeling”. In DATE, pages 44–47. [10] W. Lafi, D. Lattard, and A. Jerraya. “An efficient hierarchical router for large 3d nocs”. In Rapid System Prototyping (RSP), st IEEE International Symposium on, pages 1 –5, june 2010.

26 References [11] Mieszko Lis Myong Hyon Cho, Keun Sup Shim, Michel Kinsy, and Srinivas Devadas. “Path based, randomized, oblivious, minimal routing”. In NoCArc 2009, pages 23–28, [12] A.-M. Rahmani, P. Liljeberg, J. Plosila, and H. Tenhunen. Lastz: “An ultra optimized 3d networks-on-chip architecture”. In Digital System Design (DSD), th Euromicro Conference on, pages 173 – 180, sept [13] A.V.V. Rose, R. Seshasayanan, and G. Oviya. “Fpga implementation of low latency routing algorithm for 3d network on chip”. In Recent Trends in Information Technology (ICRTIT), 2011 International Conference on, pages 385 –388, june 2011.

27 References [14] C. Rusu, L. Anghel, and D. Avresky. “Message routing in 3d networks on chip”. In NORCHIP, 2009, pages 1 –4, nov [15] S. Tyagi and S. Bohare. “Review of 3-d network-on-chip topologies”. In Information and Communication Technologies (WICT), 2011 World Congress on, pages 783 –788, dec [16] N. Viswanathan, K. Paramasivam, and K. Somasundaram. “Performance analysis of cluster based 3d routing algorithms for noc”. In Recent Advances in Intelligent Computational Systems (RAICS), 2011 IEEE, pages 157 –162, sept

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