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Xavier Vera, Jaume Abella,Javier Carretero and Antonio Gonzalez.

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Presentation on theme: "Xavier Vera, Jaume Abella,Javier Carretero and Antonio Gonzalez."— Presentation transcript:

1 Xavier Vera, Jaume Abella,Javier Carretero and Antonio Gonzalez

2 Outline of Presentation Introduction Soft Errors Selective Replication Technique Implementation of Selective Replication Coverage and Results of Selective Replication Related work Conclusion

3 Introduction Cause for Soft Errors Why name soft error? Mean Time To Failure (MTTF) Failure In Time (FIT)

4 Introduction Which structures to protect FIT(i) = RawErrorRate × TVF × AVFw(i) Architectural Vulnerability Factor (AVF) Architecturally Correct Execution (ACE)

5 Soft Errors Scaling of the SER Problem SER Processor Implementation of the SMT Processor

6 Analysis of the FITs of the Processor

7 Selective Replication Technique What is Selective Replication? Protecting the Frontend - Map table and free list protection - Logic protection Protecting the Backend

8 Selective Replication Technique Instruction Vs Vulnerability [minAVF + (maxAVF minAVF)/25× (i 1), minAVF + (maxAVF minAVF)/25× i] Implementing the Vulnerability Threshold

9 Implementation of Selective Replication widened ROB Validation Selective Queue Priority Selection (P-Sel)

10 Implementation of Selective Replication Commit Branch Misprediction Vulnerability of the Added Hardware

11 Coverage and Results of Selective Replication Functional units are protected Logic in charge of performing the computation Latches protected by reexecution ROB,AGUs are not protected

12 Coverage and Results of Selective Replication FIT reduction Performance slowdown Power and Area overhead

13 Coverage and Results of Selective Replication SQ Size Vulnerability Threshold QoS

14 Related Work Replicating register values into unused registers Reis proposed Replicating instructions at the compiler level IBM G5 replicates the frontend and the execution engine

15 Conclusion Article presents a new approach to improve the reliability of modern processors by selectively replicating the most vulnerable instructions Achieved 60% FIT reduction with less than 4% performance degradation with small area and complexity overhead

16 Thank You…

17 Questions Please??

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