1. ASIC Electronics development for CDEX PCGe detector
Xuezhou Zhu, Zhi Deng
Department of Engineering Physics, Tsinghua University
14/10/2013
Good afternoon everyone, my topic is the ASIC Electronics development for CDEX point contact germanium detector
2013核电子学ASIC技术研讨会

2. ULE HPGe Detector for Dark Matter Search
Introduction
ULE HPGe Detector for Dark Matter Search
The key technologies for lowering the energy threshold:
small capacitance detector
ultra low noise readout
Ultra low energy High purity germanium detector is used for dark matter search.
在暗物质的探测中，使用到极低能量阈的高纯锗探测器。
The key technologies for lowering the energy threshold is using small capacitance detector and the ultra low noise readout.
而实现低的能量阈值的关键是，使用小电容的探测器，使用低噪声的读出电子学。
So here comes the question: which semiconductor process should we choose to implement readout circuit here? CMOS or JFET?
那么在这种情况下， 应该使用哪种半导体工艺来实现低噪声的读出电子学呢？是CMOS还是JFET？
As we know, JFET has a better noise to capacitance ratio than CMOS, so when with large detector capacitance, JFET is definitely a better choice for low noise。我们都知道，JFET相比CMOS，拥有更好地噪声电容斜率，因此当探测器电容较大时，无疑JFET是更好地选择。
But with very small capacitance which maybe less than 1pF, could CMOS compete with JFET? Or even have the better noise performance than JFET? That’s what we’re going to find out.
但是，对于点电极的高纯锗探测器的电容，探测器电容可能低于1pF，这时CMOS工艺是否能取得和JFET相当的噪声效果，或者是更好的噪声，这是我们要研究的。
Point-contact HPGe, ~1pF
CMOS or JFET?
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

3. Noise components of CMOS CSA
Introduction
Noise components of CMOS CSA
tm, ns
The noise of CMOS charge sensitive amplifier is composed of white noise, flicker noise, and leakage current noise,
the flicker noise is the major part.
CMOS电荷灵敏前放的噪声成分包括白噪声、1/f噪声、漏电流噪声。
通常来说1/f噪声是主要的噪声
As the detector capacitance goes down, the contribution from 1/f noise become non-dominant anymore.
而当电容很小时，1/f噪声也会减小。
As the detector capacitance goes down, the contribution from flicker noise become non-dominant anymore!
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

4. China-Korea joint workshop on dark matter and double beta decay
Introduction
CMOS vs JFET
What is the limit for CMOS’s flicker noise？
What happens as temperature goes down to 77K？
Noise of CMOS keeps decreasing
Noise of JFET is best at 120K
Borrowed from Paul O’Connor’s talk in FEE2006
e.g., Kf = 10-25J, Cd=1pF  ENCf ~ 5 e-
So how low could the flicker noise be?
we can calculate that
when detector capacitance is 1pF, the ENC contributed by the flicker noise is as low as 5 electrons.
通过计算可以知道1pF的电容时，1/f噪声的贡献仅为5个电子。
So in theory, CMOS can also achieve very low noise with small input capacitance
所以从理论上来说，CMOS在输入电容很小时，也能够实现低噪声。
And on the other hand, as temperature goes down to 77K, noise of CMOS will keep decreasing, and JFET will get its best noise at 120K, it means you can not put JFET very close to the crystal in order to reach the best noise, which means longer cable and more parasitic[,pærə'sɪtɪk] input capacitance, while CMOS do not need to concern about this, you can put it as close as possible.
而另一方面，高纯锗探测器工作在77K的液氮温度，CMOS的噪声随着温度下降会单调减小，但是JFET有最优的温度120K。因此不能将JFET放得离晶体很近，这就意味着引入连线的寄生电容，对于噪声是不利的。但CMOS不用考虑这个问题。
So why not using CMOS for the ultra low noise readout then?
因此用CMOS来做高纯锗探测器的低噪声读出，是值得一试的。
Why not CMOS then?
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

5. China-Korea joint workshop on dark matter and double beta decay
Methods
Circuit design
Noise Optimization for 1pF Detectors
Pulse reset
So our methods to prove this idea, is design and implement the CMOS integrated circuit, and test it, and compare to the results from JFET。
为了证明这个想法， 我们设计了CMOS的低噪声电荷灵敏前放，对其进行了测试，并与JFET在相同条件下的测试结果进行了对比。
So in the circuit design,
在电路设计方面，做了输入管的噪声优化设计，通过开关复位的方式消除了反馈电阻可能引入的噪声。
We optimized the type and size of the input transistor.
Using pulse reset to avoid the noise from feedback resistor.
And the bias current is adjustable for noise study
PMOS for lower 1/f noise, with optimized size
Adjustable bias current for noise study
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

6. Circuit Implementation
Methods
Circuit Implementation
Layout of one CSA channel (0.35um CMOS)
The circuit is designed and fabricated with 0.35um CMOS process, here is the layout of one CSA channel.
0.35微米工艺。
The chip is directly bonded on the PCB without any packaging, in order to keep the input capacitance as low as possible.
通过bonding的方式连接到PCB上，为了避免封装引入输入端的寄生电容。
Bonded on the PCB
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

7. China-Korea joint workshop on dark matter and double beta decay
Methods
Mount with detector
Metal
Needle
Here is some pictures showing the electronics mounted with detector, the input pin of the chip is connected to a metal needle, which contact the point of the detector.
连接探测器的图片，通过一根金属针连接到点电极。
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

8. China-Korea joint workshop on dark matter and double beta decay
Methods
Test Setup
Shaper
Oscilloscope
Signal Generator HV
Vacuum Chamber
Power Supply
Here is the test setup, the vacuum chamber is cooled by liquid nitrogen['naɪtrədʒən].
测试setup，真空腔放在液氮中。
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

9. China-Korea joint workshop on dark matter and double beta decay
Results
Noise
Simulation results and testing results(without detector)
Very close to simulation results for small input capacitance
Then is the test results.
Firstly, we tested only the electronics without the detector, the red plots is the noise verses input capacitance, and the blue ones is the circuit simulation results.
We can see the actual noise ratio is lager than the simulation results, but for small input capacitance, testing results is very close to simulation ones.
Tested and simulated at very low leakage current situation(<100fA)
<20e
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

10. China-Korea joint workshop on dark matter and double beta decay
Results
Noise VS temperature
without detector
Not change much at low temperature
Mainly due to the leakage current on the PCB
Then we test the electronics at different temperature, still without detector
As the temperature start going down, the noise will drop rapidly first, which is mainly due to the decrease of the leakage current on the PCB board.
Then at very low temperature, the noise keeps decreasing, but not changing very much.
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

11. China-Korea joint workshop on dark matter and double beta decay
Results
Detector testing
17mm
7.5ms
1.35V
Output waveform of the CSA
Thermal couple
Leakage current ~ pA
HV = V
Temperature ~ 90K
Then the electronics is mounted to a 17mm germanium detector designed and processed by another group of our dept.
This waveform shows the CSA working on pulse reset mode, we can use the reset period to calculate the leakage current.
These are the normal value of leakage current, High volt, Temp in experiment.
Cf~130fF
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

12. Detector Capacitance & Leakage Current
Results
Detector Capacitance & Leakage Current
Proper operating region
23pA
This graph shows how the detector capacitance and leakage current changing by the bias voltage. In the region from 500V to 1100V, the crystal is fully depleted with relatively low leakage current.
And in this region, we get 3pF input capacitance and 23pA leakage current.
3pF
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

13. China-Korea joint workshop on dark matter and double beta decay
Results
Am241 Energy Spectrum 59.5keV
FWHM：0.86% (512eV)
Shaping time：3us
Leakage current：26.2pA
HV：700V
Energy resolution: 512eV
Fano limit：312eV (F=0.1)
So the electronic noise equals:
− = 406eV
Leakage current 26.2pA contributes 176eV at 3us shaping time
So the noise without leakage current equals:
− = 366eV
~ 40e (320eV)
americium美[,æmə'rɪsɪəm]
This is the energy spectrum of americium 241, full width at half maximum is 0.86% 512eV
Except the fano factor of the detector, the electronic noise is 406eV
And 26pA leakage current contributes 176eV of noise at 3us shaping time.
So the noise without the leakage current is 366eV.
Compare to the test results without detector mentioned before. With 3pF input capacitance, 3us shaping time, the noise is 40 electrons 320eV FWHM, so the result with and without detector matches each other.
3pF
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

14. China-Korea joint workshop on dark matter and double beta decay
Results
Am @10us shaping time
3us shaping time
10us shaping time
Resolution(FWHM)
512eV (0.86%)
581eV (0.98%)
Electronic noise
406eV
490eV
Noise shown by oscilloscope
408eV
381eV
Noise Leakage Current
176eV
322eV
Noise without Leakage Current
− 176 2
=368eV
− 322 2
=203eV
Fano limit：312eV (F=0.1)
2.355sqrt(0.1*2.96*59.5*1000)
Pile up at longer shaping time？
RMS of waveform
although the best energy spectrum resolution is at 3us shaping time, but if we use oscilloscope to observe the electronic noise of the waveform, The best noise performance is at the longest shaping time which is 10us.
The difference between the energy spectrum resolution and the noise of waveform at longer shaping time maybe due to the pile up.
So if we consider 381eV is the electronic noise of 10us, the leakage current contributes more noise at 10us, so the noise without leakage current is about 200eV, which also matches the result of non-detector testing.
3us ~ 40e (320eV)
10us ~ 20e (160eV)
3pF
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

15. China-Korea joint workshop on dark matter and double beta decay
Results
Cs137 Energy Spectrum 662keV
(1.18keV)
HV=700V | 3us shaping time | 26.2pA
FWHM total = eV
FWHM statistic = eV
FWHM electronics noise =549eV
The cesium/siziem/ 137 full-energy-peak resolution is 0.178% 1.18keV.
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

16. China-Korea joint workshop on dark matter and double beta decay
Results
Compare with JFET
Am241
CMOS( 3us RC)
JFET( 4us RC)
Resolution(FWHM)
512eV (0.86%)
591eV (0.99%)
Electronic Noise
406eV
502eV
Amplifier
ORTEC 570
Canberra 2026
Shaping Time
3us
4us
High Voltage
700V
800V
Leakage Current
26.2pA
49.9pA
Noise Leakage Current
176eV
281eV
Noise without Leakage Current
− 176 2
=366eV
− 281 2
=416eV
Changing circuit without reprocess the crystal degraded the performance(leakage current increased)
A low-noise JFET is also tested by another group using the same equipment, with almost the same setup.
But changing circuit without reprocess the crystal degrade the performance a little, the leakage current increased.
But get rid of the contribution of the leakage current, the noise without leakage current indicates the CMOS ASIC achieved better noise than this low noise JFET 2N4416
NOISE4us_CMOS < NOISE3us_CMOS < NOISE4us_JFET
JFET test setup, almost the same as CMOS
(JFET - 2N4416)
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

17. China-Korea joint workshop on dark matter and double beta decay
Summary
Summary
A CMOS CSA ASIC is designed and tested, archiving good noise performance:
80eV-FWHM(10e) at zero Cin (without detector)
RC=10us, Cd=3pF, 90K, which is even better than the result of a low-noise JFET 2N4416 tested at similar conditions
Energy spectrum resolution of 0.178% for 662keV and 0.86% for 59.5keV can be achieved by a 17mm dia. Point-Contact HPGe + CMOS CSA ASIC
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay

18. China-Korea joint workshop on dark matter and double beta decay
Summary
Summary
The world’s best result by JFET:
LBNL Front-End proven performance with 20g mini PPC: 85eV FWHM
Cd~1pF, very low leakage current
380eV
CMOS 26pA, 10us, Cd=3pF
Get rid of the contribution of leakage current
200eV
Optimize the Cd from 3pF to 1pF
So far, the world’s best result by JFET is 85 eV FWHM, from LBNL, tested with 20g mini PPC, the detector capacitance is about 1pF, with very low leakage current.
The noise of the CMOS ASIC at 26pA，10us，3pf is 380eV，if the leakage can be very low, the noise will be 200eV
If the detector capacitance can be optimized from 3pF to 1pF, noise better than 100eV could be possible
And with further improvements such as:
Using more advanced process with lower flicker noise
Circuit optimization
Better grounding and shielding
Better vacuum and cryogenic[,kraɪə'dʒɛnɪk] system
We hope CMOS could achieve ultra low noise even better than 85eV, pushing the low energy threshold to a new limit
<100eV?
Further improvements:
More advanced process (0.18um)
Circuit optimization
Grounding and shielding
Better vacuum and cryogenic system ?
2013/7/2
 China-Korea joint workshop on dark matter and double beta decay
20g mini PPC

19. Summary
Thank you
Q & A