1. Chapter 20 This chapter provides a series of applications. There is no daughter cards with the DSK6713 and DSK6416 Part 1: Applications using the PCM3003 AUDIO Part 1: Applications using the PCM3003 AUDIO DAUGHTER CARD TMDX326040A) by Richard Sikora Part 2: USB Daughter Board. by ATE Communications Part 3: PCI C6711 DSP Educational Board. by ATE Communications

2. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 2Introduction Some audio applications for the TMS320C6711 DSK with Audio Daughter Card have been provided. Some audio applications for the TMS320C6711 DSK with Audio Daughter Card have been provided. These include: These include: Alien Voices: Changing voices using ring modulation. Widely used in science- fiction films for alien voices. Alien Voices: Changing voices using ring modulation. Widely used in science- fiction films for alien voices. Delays and Echo: Using buffers to delay a signal up to 4 seconds to simulate echo from a valley / cavern. Delays and Echo: Using buffers to delay a signal up to 4 seconds to simulate echo from a valley / cavern. Electronic Crossover: Dividing audio signal into bass and treble using Finite Impulse Response (FIR) filters. Electronic Crossover: Dividing audio signal into bass and treble using Finite Impulse Response (FIR) filters.

3. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 3Introduction These include: These include: Guitar Effects: Changing sound of an electric guitar by adding reverberation, treble boost and distortion. Guitar Effects: Changing sound of an electric guitar by adding reverberation, treble boost and distortion. Guitar Tuner: Tuning the strings of an electric guitar using an adaptive filter. Display of accuracy of tuning on LEDs. Guitar Tuner: Tuning the strings of an electric guitar using an adaptive filter. Display of accuracy of tuning on LEDs. Playback and Record: Using buffers to record and playback sounds. Half speed and double speed playback. Introduces concepts of decimation and interpolation. Playback and Record: Using buffers to record and playback sounds. Half speed and double speed playback. Introduces concepts of decimation and interpolation. Reverberation: Simulation of reflections from walls to make a small room sound like an auditorium. Reverberation: Simulation of reflections from walls to make a small room sound like an auditorium.

4. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 4Introduction These include: These include: Signal Generator: Generating test waveforms – sine and triangle, continuous, burst and sweep between 60 Hz and 12 kHz. Signal Generator: Generating test waveforms – sine and triangle, continuous, burst and sweep between 60 Hz and 12 kHz.

5. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 5 Code Location The CCS projects are in the following location: The CCS projects are in the following location: \Code\Chapter 20 – Other Applications\Audio \Code\Chapter 20 – Other Applications\Audio Daugter card… Daugter card… See the following for more information: See the following for more information: \Links\Using the Applications.pdf \Links\Using the Applications.pdf \Links\Using the Applications.pdf \Links\Using the Applications.pdf

6. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 6 Chapter 20, Part 2 USB Daughter Board USB Daughter Board by ATE Communications (www.ate.co.uk) www.ate.co.uk

7. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 7Overview Combined signal acquisition/generation and USB interface card: Combined signal acquisition/generation and USB interface card: Data acquisition/generation via 1 audio CODEC, 2 ADCs and 2 DACs. (See Chapter 8 for applications). Data acquisition/generation via 1 audio CODEC, 2 ADCs and 2 DACs. (See Chapter 8 for applications). PC interface to DSK via USB chipset. PC interface to DSK via USB chipset. USB chipset to DSP on DSK via EMIF. USB chipset to DSP on DSK via EMIF.

8. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 8 Audio CODEC: CS4218 (see Chapter 8) High quality stereo audio input and output. High quality stereo audio input and output. Sampling rate of 48 kHz. Sampling rate of 48 kHz. 16 bit output (same resolution as audio CD). 16 bit output (same resolution as audio CD). Interface to DSP via serial ports. Interface to DSP via serial ports.

9. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 9 ADCs and DACs: AD9220 and AD768 Two ADCs for digital to analogue conversion of high frequency signals. Two ADCs for digital to analogue conversion of high frequency signals. Two DACs for arbitrary waveform generation of high frequency signals. Two DACs for arbitrary waveform generation of high frequency signals. Interface between DSP and converters via DSP's EMIF. Interface between DSP and converters via DSP's EMIF.

10. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 10 USB Interface Chipset USB revision 1.1 full speed device. USB revision 1.1 full speed device. 16 bit interface to DSP via EMIF. 16 bit interface to DSP via EMIF. Data transfer rates between DSP and PC of up to 7M bits per second. Data transfer rates between DSP and PC of up to 7M bits per second. Internal FIFOs with programmable empty and full flags connected to DSP's timer input pins. Internal FIFOs with programmable empty and full flags connected to DSP's timer input pins.

11. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 11 Using the Audio CODEC (1) Set up transmit and receive serial ports' pins. Serial ports should be set up to use external frame synch and clock signals. Set up transmit and receive serial ports' pins. Serial ports should be set up to use external frame synch and clock signals. Rising edges are used to clock transmit/receive data and frame synchs are active high. Rising edges are used to clock transmit/receive data and frame synchs are active high.

12. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 12 Using the Audio CODEC (2) Set up the serial ports to use 32 bit words, the data are delayed by one clock edge, no companding is used. Set up the serial ports to use 32 bit words, the data are delayed by one clock edge, no companding is used. The sample data are in the upper 16 bit words of each 32 bit word. The lower 16 bits are used for control information. The sample data are in the upper 16 bit words of each 32 bit word. The lower 16 bits are used for control information.

13. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 13 Using the DACs and ADCs (1) The DACs and ADCs are connected to the DSP's EMIF. The DACs and ADCs are connected to the DSP's EMIF. DACs and ADCs can be accessed by reading from and writing to the DSP's CE3 memory space. DACs and ADCs can be accessed by reading from and writing to the DSP's CE3 memory space.

14. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 14 Using the DACs and ADCs (2) A 32 bit read from the CE3 memory space reads packed data, two 16 bit words per 32 bit word. The ADCs have 12 bit resolution and should be converted to 2's complement signed values. A 32 bit read from the CE3 memory space reads packed data, two 16 bit words per 32 bit word. The ADCs have 12 bit resolution and should be converted to 2's complement signed values. A 32 bit write to the CE3 memory space writes data to both DACs. The data are packed, two 16 bit words per 32 bit word. The DACs have 16 bit resolution. A 32 bit write to the CE3 memory space writes data to both DACs. The data are packed, two 16 bit words per 32 bit word. The DACs have 16 bit resolution.

15. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 15 Using the USB interface (1) Using the USB interface from the PC requires software to communicate with the device driver. Using the USB interface from the PC requires software to communicate with the device driver. The USB chipset is connected to the DSP via the EMIF. The USB chipset is connected to the DSP via the EMIF. The USB chip is mapped to the DSP's CE2 memory space. The USB chip is mapped to the DSP's CE2 memory space. The CE2 memory space should be set up using the following value for the CE2 control register: 0x7136C424. The CE2 memory space should be set up using the following value for the CE2 control register: 0x7136C424.

16. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 16 Using the USB interface (2) Reading and writing to USB accomplished by accessing CE2 memory space. Reading and writing to USB accomplished by accessing CE2 memory space. FIFO flags connected to DSPs timer inputs provide information on USB chips FIFO status. FIFO flags connected to DSPs timer inputs provide information on USB chips FIFO status. DSP should monitor FIFO flags to avoid under or overruns. DSP should monitor FIFO flags to avoid under or overruns.

17. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 17 PC - USB daughter board communication Communicating with the board from the PC requires code to interface to the USB device driver. Communicating with the board from the PC requires code to interface to the USB device driver. Lower level details of communicating with the device are handled by the device driver. Lower level details of communicating with the device are handled by the device driver. Code running on a built-in micro controller on the USB chip is used to move the data between the USB buffers and external port FIFOs. Code running on a built-in micro controller on the USB chip is used to move the data between the USB buffers and external port FIFOs.

18. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 18 PC - USB daughter board communication Application: FFT processed on the DSK, results sent to the PC via the USB interface results sent to the PC via the USB interface and the spectrum is display on the PC. Files location: \Chapters\Usb

19. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 19 Chapter 20, Part 3 PCI C6711 DSP Educational Board, PCIC67AT PCIC67AT by ATE Communications (www.ate.co.uk) www.ate.co.uk Datasheet Block Diagram Block Diagram

20. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 20 Overview (1) C6711 based PCI card with a variety of signal acquisition and generation peripherals. C6711 based PCI card with a variety of signal acquisition and generation peripherals. Video encoder for acquisition of video data. Video encoder for acquisition of video data. Video decoder for generation of video signals. Video decoder for generation of video signals. Stereo audio CODECs for acquisition and generating audio signals. Stereo audio CODECs for acquisition and generating audio signals. High frequency ADCs and DACS for high frequency signal acquisition and generation. High frequency ADCs and DACS for high frequency signal acquisition and generation.

21. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 21 Overview (2) Additional features: PC has access to DSP via PCI interface. PC has access to DSP via PCI interface. JTAG controller for tight integration with CCS. JTAG controller for tight integration with CCS. Bus matching FIFOs for managing high bandwidth of video data on video encoder and decoder. Bus matching FIFOs for managing high bandwidth of video data on video encoder and decoder. Large amount of SDRAM for program and data storage. Large amount of SDRAM for program and data storage.

22. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 22 Video encoder DSP has access to video encoder output data via memory mapped FIFO. DSP has access to video encoder output data via memory mapped FIFO. FIFO flag connected to DSP's external interrupt to facilitate using EDMA to move data from FIFO to other memory locations. FIFO flag connected to DSP's external interrupt to facilitate using EDMA to move data from FIFO to other memory locations. Video encoder set up using I2C bus. Video encoder set up using I2C bus. Video encoder should write framing codes to FIFO to facilitate synchronising to data stream. Video encoder should write framing codes to FIFO to facilitate synchronising to data stream.

23. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 23 Video decoder DSP has access to video decoder input port via memory mapped FIFO. DSP has access to video decoder input port via memory mapped FIFO. Video decoder data input format compatible with output format of encoder. Video decoder data input format compatible with output format of encoder. Video encoder internal registers set up via I2C bus. Video encoder internal registers set up via I2C bus.

24. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 24 Audio CODECs: CS4218 Connected to DSP's serial ports. Connected to DSP's serial ports. Two stereo audio CODECs available providing four input and four output channels. Two stereo audio CODECs available providing four input and four output channels. Audio CODECs use 16 bit data at 48 kHz sampling rate. Audio CODECs use 16 bit data at 48 kHz sampling rate.

25. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 25 ADCs and DACs: AD9220, AD768 High frequency ADCs for capturing of high frequency signals High frequency ADCs for capturing of high frequency signals ADCs memory mapped in DSP for high bandwidth parallel interface ADCs memory mapped in DSP for high bandwidth parallel interface DACs useful for outputting processed waveforms or arbitrary waveform generation DACs useful for outputting processed waveforms or arbitrary waveform generation DACs memory mapped in DSP for high bandwidth parallel interface DACs memory mapped in DSP for high bandwidth parallel interface

26. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 26 Programming the DSP Use of JTAG emulator connected to JTAG header on board. Use of JTAG emulator connected to JTAG header on board. Directly in CCS via on board JTAG controller. Directly in CCS via on board JTAG controller. Single step debugging of DSP possible when using CCS. Single step debugging of DSP possible when using CCS. Access to all internal memory locations of DSP via HPI connected to PCI interface. Access to all internal memory locations of DSP via HPI connected to PCI interface.

27. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 27 Accessing data on DSP from PC Using PCI device driver. Using PCI device driver. PCI devices are plug and play, set up of devices in PC straightforward. PCI devices are plug and play, set up of devices in PC straightforward. PCI device connected to DSP's HPI. PCI device connected to DSP's HPI. Via DSP's EMIF programmer has access to all peripherals connected to EMIF. Via DSP's EMIF programmer has access to all peripherals connected to EMIF.

28. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 28 Stand alone operation External power connector for stand alone operation. External power connector for stand alone operation. Programming DSP via JTAG header using JTAG interface board such as XDS510. Programming DSP via JTAG header using JTAG interface board such as XDS510. Less complex than PCI set up, no operating system trouble or need for device drivers. Less complex than PCI set up, no operating system trouble or need for device drivers.

29. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004 Chapter 20, Slide 29 Chapter 20 - End -