1. ATA over internet

2. ATA/ATAPI 7 Command delivery
For devices that do not implement the PACKET Command feature set, all commands and command parameters are delivered by writing the device Command Block registers.
Devices that implement the PACKET Command feature set use packet delivered commands as well as some register delivered commands.

3. PACKET Command feature set
General feature set defines the common commands implemented by devices.
PACKET Command feature set
provides for devices that require command parameters that are too extensive to be expressed in the Command Block registers.
Power Management feature set
Advanced Power Management feature set
Security Mode feature set
SMART (Self-monitoring, analysis, and reporting technology) feature set
to protect user data and minimize the likelihood of unscheduled system downtime that may be caused by predictable degradation and/or fault of the device.
attempt to predict the likelihood of near-term degradation or fault condition.
Host Protected Area feature set
CompactFlash™ Association (CFA) feature set

4. Removable Media Status Notification and Removable Media feature sets
Power-Up In Standby feature set
Automatic Acoustic Management (AAM) feature set
48-bit Address feature set
Device Configuration Overlay feature set
Media Card Pass Through Command feature set
Streaming feature set
General Purpose Logging feature set
Overlapped feature set
lows devices that require extended command time to perform a bus
release so that the other device on the bus may be used.

5. Long Physical Sector Feature Set for Non-Packet Devices
Queued feature set
issue concurrent commands to the same device.
Long Physical Sector Feature Set for Non-Packet Devices
Long Logical Sector Feature Set for Non-Packet Devices

6. I/O register descriptions
The Command Block registers are used for sending commands to the device or posting status from the device.
The Control Block registers are used for device control and to post alternate status.

7. Command Descriptions Commands are issued to the device by:
loading the required registers in the command block with the needed parameters
then writing the command code to the Command register.

10. Parallel interface signal assignments and descriptions
The physical interface consists of receivers and drivers communicating through a set of conductors using an asynchronous interface protocol.

11. Parallel interface general operational requirements
Interrupts-INTRQ is used by the selected device to notify the host of an event. The device internal Interrupt Pending state is set when such an event occurs.
Multiword DMA
Ultra DMA feature set
Host determination of cable type by detecting CBLID

12. Parallel interface register addressing
Registers are defined depending on whether reading or writing the register and whether the PACKET command feature set is implemented

13. Parallel interface transport protocol
Commands are grouped into different classes according to the protocol followed for command execution.
The command classes with their associated protocol are defined in state diagrams:

15. Serial interface general overview
The serial implementation of ATA is a high-speed serial replacement for the parallel implementation of ATA attachment of mass storage devices.

16. Two devices are connected to a Parallel ATA host adapter
Two devices are connected to a Parallel ATA host adapter. This method allows up to two devices to be connected to a single port using a Device 0/Device 1 communication technique. Each device is connected via a ribbon cable that “daisy chains” the devices.

17. The same two devices are connected using a serial implementation of an ATA host
adapter. ATA host software accesses the serial implementation of ATA subsystem in the same manner and functions in the same way as previous parallel implementation definitions. In this case, however, the software views the two devices as if they were both Device 0 on two separate ports.

18. Each layer communicates with its counterpart directly or indirectly
The Transport control state machine and the Link state machine are the two core sub-modules that control overall operation.
The Link state machine controls the operation(s) related to the serial line
And the Transport control state machine controls the operation(s) relating to the host platform.
The two state machines coordinate their actions and utilize resources to transfer data between a host computer and attached mass storage device.
The host Link state machine communicates via the serial line to a corresponding Link state machine located in the device.
The host Transport machine also likewise communicates with a corresponding device Transport state machine.
The two Link state machines ensure that control sequences between the two Transport control state machines are properly exchanged. Figure 6 shows how the machines communicate their various needed parameters in the traditional layered model.
Each layer communicates with its counterpart directly or indirectly

20. Serial interface Link layer
The Link layer transmits and receives frames, transmits primitives based on control signals from the Transport layer, and receives primitives from the Physical layer which are converted to control signals to the Transport layer.
The Link layer need not be understood of the content of frames.
Host and device Link layer state machines differ only in the fact that the host shall back-off in the event of a collision when attempting to transmit a frame

21. Frame transmission- When requested by the Transport layer to transmit a frame, the Link layer provides the following services:
Negotiates with its peer Link layer to transmit a frame, resolves arbitration conflicts if both host and device request transmission
Inserts frame envelope around Transport layer data (i.e., SOF, CRC, EOF, etc.).
Receives data in the form of DWORDs from the Transport layer.
Calculates CRC on Transport layer data.
Transmits frame.
Provides frame flow control in response to requests from the FIFO or the peer Link layer.
Receives frame receipt acknowledge from peer Link layer.
Reports good transmission or Link/Physical layer errors to Transport layer.
Performs 8b/10b encoding
Scrambles (transforms) control and data DWORDs in such a way to distribute the potential EMI emissions over a broader range.

22. Frame receipt - When data is received from the Physical layer, the Link layer provides the following services:
Acknowledges to the peer Link layer readiness to receive a frame.
Receives data in the form of encoded characters from the Physical layer.
Decodes the encoded 8b/10b character stream into aligned DWORDs of data.
Removes the envelope around frames (i.e., SOF, CRC, EOF).
Calculates CRC on the received DWORDs.
Provides frame flow control in response to requests from the FIFO or the peer Link layer.
Compares the calculated CRC to the received CRC.
Reports good reception or Link/Physical layer errors to Transport layer and the peer Link layer.
Descrambles (untransforms) the control and data DWORDs received from a peer Link layer.

23. Link layer state diagrams
Link idle state diagram
Link transmit state diagram
Link receive state diagram
Link power mode state diagram

28. Serial interface Transport layer
The Transport layer need not be cognizant of how frames are transmitted and received. The Transport layer constructs Frame Information Structures (FIS’s) for transmission and decomposes received Frame Information Structures. Host and device Transport layer state differ in that the source of the FIS content differs. The Transport layer maintains no context in terms of ATA commands or previous FIS content.

29. FIS types Register - Host to Device Register - Device to Host
Set Device Bits - Device to Host
DMA Activate - Device to Host
First Party DMA Setup - Device to Host or Host to Device (Bidirectional)
BIST Activate - Bidirectional
PIO Setup - Device to Host
Data - Host to Device or Device to Host (Bidirectional)

30. Example:

31. Wireless ATA (S. Ozler, I. Korpeoglu)
Mainly 3 components in ATA:
Device
Controller
Software-device driver

32. Different types of controller existsIt could be done as a software
Device driver
controller
ATA bus interface
Device driver communicates with controller to make request to devices

33. Layered Model Application Layer Transport Layer Buffering Layer
Crypto Layer
Link Layer
Physical Layer

34. Packet Structure Features: Parameters for the command
Sector Count: Number of sectors that will be used
LBA: Logical Block Address of the starting sector that will be used
Device: Device selection and additional bits for LBA
Command: Command code
Error: Bits indicating different errors
Status: Bits indicating status of the action

35. Command Set
Command Set - small subset of ATAPI specification command set.
Control Commands:
FLUSH-CACHE
IDENTIFY-DEVICE
SET-FEATURES
Data Commands:
READ-SECTORS
WRITE-SECTORS

36. Thank you.