1. “C” and Assembly Language- What are they good for?
Class 2: An MCU as a Software Target
7/30/2013
Warren Miller

2. This Week’s Agenda
7/29/13 Introduction to MCU Architecture 7/30/13 An MCU as a Software Target 7/31/13 Assembly Language for MCUs 8/01/13 “C” for MCUs 8/02/13 Assembly vs. “C” Fight Club!

3. Class Description
"C" and Assembly language are by far the most popular languages for programming MCUs.
This class will highlight some of the key characteristics of both "C" and Assembly language as programming ‘paradigms’.
Examples of things these languages are 'good' for and 'bad' for will help illustrate an efficient thought process that can help guide the selection of the 'right' language for a particular algorithm.

4. Today’s Topics Goals and Objectives
MCU Architecture- Advanced Concepts
Instruction Pipeline
Instruction/Data Cache
Call and Return
Interrupts
RISC and CISC
Execution Efficiency
MCU Program Control Peripherals

5. Goals and Objectives
Expand our understanding to cover advanced MCU architecture topics- in particular efficiency related topics
Need to know these concepts to understand how programs are mapped into MCU instructions
Need to compare alternative architectures
Need to uderstand common optimization techniques

6. Simple MCU Architecture: Advanced Concepts
Example Simple CPU Architecture PC
Instruction Memory
Decode
Data Memory
MAR
MDR
Register File
ALU

7. Instruction Pipelines
Pipeline Use
Single cycle execution results in a long clock cycle
Break execution into three equal delay phases
Overlap phases
Faster Clock cycle
Clock 1
Clock 2
Clock 3
Inst 1
Fetch
Decode
Execute
Inst 2
Inst 3
Clock 1
Delay
Fetch
3.3ns
Decode
Execute

8. Instruction Pipelines
Advantages
Faster Clock Rate
Higher performance
Improved power efficiency
Efficient for inline code
Many advance computations can be done inline- no jumps needed
Disadvantages
Conditional jumps interrupt the pipe
Loops for example
Delays not ‘deterministic’
Execution path depends on data

9. Instruction/Data Cache
MAR
When Memory access is slow
Store recent accesses in smaller faster memory
Compare address in cache to see if it was recently accessed
Read data from Cache if a HIT
Read data from memory and store in Cache if a MISS
Can be even more efficient if memory is accessed in ‘Blocks’
Memory
Cache

10. Types of Memory Cache Direct Mapped- Simple, more MISSES
N-way Associative- Balanced
Fully Associative- Complex, less MISSES
Cache
Upper
Address
Compare
Two (N)
Address
Compares

11. Call and Return Call: Save State and Jump to Subroutine
Save Registers + Condition Codes + PC<Next>
Store to memory at Stack Pointer location
Return: Restore State
Pop all registers
Load PC
Delay Stacking
Data Memory
Registers
Stack
Stack Pointer
Reg 1
Reg 2
Reg 3 PC

12. Interrupts Similar to Call/Return, but
Can happen based on hardware signals
Immediate attention required
Priority and Masking

13. CISC and RISC Architectures
CISC Architecture
‘Complex’ Instructions
Multiple Addressing Modes
Slower clock rate
Multiple cycles
Difficult to pipeline
Code Efficient Instructions
Fewer instructions needed
Less memory required
Easier to map to High Level Language (HLL) constructs
RISC Architecture
‘Simple’ Instructions
Load and Store
Faster clock rate
Single cycle
Easy to pipeline
Less Code Efficient
More instructions needed
More memory required
Modern compilers make HLL mapping easy

14. Execution Efficiency How to determine efficiency? Clock Frequency
Memory, Cache, Pipelines, Instruction Set,
Benchmarks (DMIPs)
1 DMIPs = VAX 11/780
DMIPs/MHz
DMIPs is computation oriented- your mileage may vary!
The Dhrystone benchmark contains no floating point operations, thus the name is a pun on the then-popular Whetstone benchmark for floating point operations. The output from the benchmark is the number of Dhrystones per second (the number of iterations of the main code loop per second).
Both Whetstone and Dhrystone are synthetic benchmarks, meaning that they are simple programs that are carefully designed to statistically mimic the processor usage of some common set of programs. Whetstone, developed in 1972, originally strove to mimic typical Algol 60 programs based on measurements from 1970, but eventually became most popular in its Fortran version, reflecting the highly numerical orientation of computing in the 1960s.

15. Other MCU Features Intelligent Peripherals (For Program Control)
Timers
Real Time Clocks
Direct Memory Access (DMA) controller
Watch Dog Timer
Etc.

16. Additional Resources
MicroController Central Web Site: Max Maxfield: Bebop to the Boolean Boogie Computer Architecture Classes: (Computer Architecture, MIT) Li-Shiuan Peh Programming Paradigms (Stanford) Jerry Cain (iTunes University) Introduction to Algorithms (MIT) Erik Demaine (iTunes University) Introduction to Computer Science and Programming (MIT) Eric Grimson, John Guttag (iTunes University)

17. This Week’s Agenda
7/29/13 Introduction to MCU Architecture 7/30/13 An MCU as a Software Target 7/31/13 Assembly Language for MCUs 8/01/13 “C” for MCUs 8/02/13 Assembly vs. “C” Fight Club!