Presentation is loading. Please wait.

Presentation is loading. Please wait.

Feedback 1.

Similar presentations

Presentation on theme: "Feedback 1."— Presentation transcript:

1 Feedback 1

2 sedr42021_0801.jpg Figure 8.1 General structure of the feedback amplifier. This is a signal-flow diagram, and the quantities x represent either voltage or current signals.

3 sedr42021_e0801.jpg Figure E8.1

4 sedr42021_0802a.jpg Figure 8.2 Illustrating the application of negative feedback to improve the signal-to-noise ratio in amplifiers.

5 sedr42021_0803.jpg Figure 8.3 Illustrating the application of negative feedback to reduce the nonlinear distortion in amplifiers. Curve (a) shows the amplifier transfer characteristic without feedback. Curve (b) shows the characteristic with negative feedback (b = 0.01) applied.

6 sedr42021_0804a.jpg Figure 8.4 The four basic feedback topologies: (a) voltage-mixing voltage-sampling (series–shunt) topology; (b) current-mixing current-sampling (shunt–series) topology; (c) voltage-mixing current-sampling (series–series) topology; (d) current-mixing voltage-sampling (shunt–shunt) topology.

7 sedr42021_0805.jpg Figure 8.5 A transistor amplifier with shunt–series feedback. (Biasing not shown.)

8 sedr42021_0806.jpg Figure 8.6 An example of the series–series feedback topology. (Biasing not shown.)

9 sedr42021_0807a.jpg Figure 8.7 (a) The inverting op-amp configuration redrawn as (b) an example of shunt–shunt feedback.

10 sedr42021_0808a.jpg Figure 8.8 The series–shunt feedback amplifier: (a) ideal structure and (b) equivalent circuit.

11 sedr42021_0809.jpg Figure 8.9 Measuring the output resistance of the feedback amplifier of Fig. 8.8(a): Rof : Vt/I.

12 sedr42021_0810a.jpg Figure Derivation of the A circuit and b circuit for the series–shunt feedback amplifier. (a) Block diagram of a practical series–shunt feedback amplifier. (b) The circuit in (a) with the feedback network represented by its h parameters.

13 sedr42021_0810c.jpg Figure (Continued) (c) The circuit in (b) with h21 neglected.

14 sedr42021_0811ab.jpg Figure Summary of the rules for finding the A circuit and b for the voltage-mixing voltage-sampling case of Fig. 8.10(a).

15 sedr42021_0812a.jpg Figure Circuits for Example 8.1.

16 sedr42021_0812b.jpg Figure (Continued)

17 sedr42021_e0805.jpg Figure E8.5

18 sedr42021_0813a.jpg Figure The series–series feedback amplifier: (a) ideal structure and (b) equivalent circuit.

19 sedr42021_0814.jpg Figure Measuring the output resistance Rof of the series–series feedback amplifier.

20 sedr42021_0815a.jpg Figure Derivation of the A circuit and the b circuit for series–series feedback amplifiers. (a) A series–series feedback amplifier. (b) The circuit of (a) with the feedback network represented by its z parameters.

21 sedr42021_0815c.jpg Figure (Continued) (c) A redrawing of the circuit in (b) with z21 neglected.

22 sedr42021_0816ab.jpg Figure Finding the A circuit and b for the voltage-mixing current-sampling (series–series) case.

23 sedr42021_0817a.jpg Figure Circuits for Example 8.2.

24 sedr42021_0817b.jpg Figure (Continued)

25 sedr42021_0817c.jpg Figure (Continued).

26 sedr42021_0818.jpg Figure Ideal structure for the shunt–shunt feedback amplifier.

27 sedr42021_0819.jpg Figure Block diagram for a practical shunt–shunt feedback amplifier.

28 sedr42021_0820ab.jpg Figure Finding the A circuit and b for the current-mixing voltage-sampling (shunt–shunt) feedback amplifier in Fig

29 sedr42021_0821a.jpg Figure Circuits for Example 8.3.

30 sedr42021_0821c.jpg Figure (Continued)

31 sedr42021_0822.jpg Figure Ideal structure for the shunt–series feedback amplifier.

32 sedr42021_0823.jpg Figure Block diagram for a practical shunt–series feedback amplifier.

33 sedr42021_0824ab.jpg Figure Finding the A circuit and b for the current-mixing current-sampling (shunt–series) feedback amplifier of Fig

34 sedr42021_0825a.jpg Figure Circuits for Example 8.4.

35 sedr42021_0825b.jpg Figure (Continued)

36 sedr42021_0825c.jpg Figure (Continued)

37 sedr42021_e0807.jpg Figure E8.7

38 sedr42021_0826a.jpg Figure A conceptual feedback loop is broken at XX¢ and a test voltage Vt is applied. The impedance Zt is equal to that previously seen looking to the left of XX¢. The loop gain Ab = –Vr/Vt, where Vr is the returned voltage. As an alternative, Ab can be determined by finding the open-circuit transfer function Toc, as in (c), and the short-circuit transfer function Tsc, as in (d), and combining them as indicated.

39 sedr42021_0827a.jpg Figure The loop gain of the feedback loop in (a) is determined in (b) and (c).

40 sedr42021_0828.jpg Figure The Nyquist plot of an unstable amplifier.

41 sedr42021_0829a.jpg Figure Relationship between pole location and transient response.

42 sedr42021_0830a.jpg Figure Effect of feedback on (a) the pole location and (b) the frequency response of an amplifier having a single-pole open-loop response.

43 sedr42021_0831.jpg Figure Root-locus diagram for a feedback amplifier whose open-loop transfer function has two real poles.

44 sedr42021_0832.jpg Figure Definition of w0 and Q of a pair of complex-conjugate poles.

45 sedr42021_0833.jpg Figure Normalized gain of a two-pole feedback amplifier for various values of Q. Note that Q is determined by the loop gain according to Eq. (8.65).

46 sedr42021_0834a.jpg Figure Circuits and plot for Example 8.5.

47 sedr42021_0835.jpg Figure Root-locus diagram for an amplifier with three poles. The arrows indicate the pole movement as A0b is increased.

48 sedr42021_e0813.jpg Figure E8.13

49 sedr42021_0836.jpg Figure Bode plot for the loop gain Ab illustrating the definitions of the gain and phase margins.

50 sedr42021_0837.jpg Figure Stability analysis using Bode plot of |A|.

51 sedr42021_0838.jpg Figure Frequency compensation for b = The response labeled A¢ is obtained by introducing an additional pole at fD. The A² response is obtained by moving the original low-frequency pole to f ¢D.

52 sedr42021_0839a.jpg Figure (a) Two cascaded gain stages of a multistage amplifier. (b) Equivalent circuit for the interface between the two stages in (a). (c) Same circuit as in (b) but with a compensating capacitor CC added. Note that the analysis here applies equally well to MOS amplifiers.

53 sedr42021_0840a.jpg Figure (a) A gain stage in a multistage amplifier with a compensating capacitor connected in the feedback path and (b) an equivalent circuit. Note that although a BJT is shown, the analysis applies equally well to the MOSFET case.

54 sedr42021_0841.jpg Figure Circuit of the shunt–series feedback amplifier in Example 8.4.

55 sedr42021_0842a.jpg Figure Circuits for simulating (a) the open-circuit voltage transfer function Toc and (b) the short-circuit current transfer function Tsc of the feedback amplifier in Fig for the purpose of computing its loop gain.

56 Figure Circuit for simulating the loop gain of the feedback amplifier circuit in Fig using the replica-circuit method.

57 sedr42021_0844.jpg Figure (a) Magnitude and (b) phase of the loop gain Ab of the feedback amplifier circuit in Fig

58 sedr42021_e0801.jpg Figure P8.4

59 sedr42021_p0819a.jpg Figure P8.19

60 sedr42021_p0826a.jpg Figure P8.26

61 sedr42021_p0830.jpg Figure P8.30

62 sedr42021_p0832.jpg Figure P8.32

63 sedr42021_p0833.jpg Figure P8.33

64 sedr42021_p0834.jpg Figure P8.34

65 sedr42021_p0835.jpg Figure P8.35

66 sedr42021_p0838.jpg Figure P8.38

67 sedr42021_p0839.jpg Figure P8.39

68 sedr42021_p0840.jpg Figure P8.40

69 sedr42021_p0842.jpg Figure P8.42

70 sedr42021_p0844.jpg Figure P8.44

71 sedr42021_p0846a.jpg Figure P8.46

72 sedr42021_p0848.jpg Figure P8.48

73 sedr42021_p0851eps.jpg Figure P8.51

74 sedr42021_p0852.jpg Figure P8.52

75 sedr42021_p0881.jpg Figure P8.81

Download ppt "Feedback 1."

Similar presentations

Ads by Google