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Next steps for SPP & ONL 2/6/2007

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Presentation on theme: "Next steps for SPP & ONL 2/6/2007"— Presentation transcript:

1 Next steps for SPP & ONL 2/6/2007
Jon Turner

2 Objectives for SPP-NPE version 2
Deal with constraints imposed by switch can send to only one NPU; can receive from only one NPU split processing across NPUs parsing, lookup on one; queueing on other Provide more resources for slice-specific processing Decouple QM schedulers from links collection of largely independent schedulers may use several to send to the same link e.g. separate rate classes (1-10M, M, M) optionally adjust scheduler rates dynamically Provide support for multicast requires addition of next-hop IP address after queueing Enable single slice to operate at 10 Gb/s

3 NPE Version 2 Block Diagram
Lookup produces resultIndx, statsIndx slice#, resultIndx passed in shim SRAM Tx (2 ME) TCAM Decap, Parse, Lookup, AddShim (8 MEs) Stats (1 ME) from switch Rx flow control? large scratch ring SRAM to switch Queue Manager (4 MEs) Rx (2 ME) Tx Lookup &Copy HdrFmt Stats (1 ME) large scratch ring for unicast, resultIndx replaced by QiD; allowing output side to skip lookup Lookup on <slice#, resultIndx> yields fanout, list of QiDs; copy to queues, adding copy#; (slice#, resultIndx remain in packet buffer) use slice# to select slice to format packet; use resultIndx to get next-hop

4 Statistics LC provides counts on UDP ports
Matching filter gives slice-specific stats-index which is updated for each packet handled by filter Pre-queue/post-queue counters for each QiD Memory space/bandwidth issues off-chip SRAMs support 200M 32 bit reads & writes per sec can have 16M 80 byte packets/sec, so one SRAM supports 12 reads/12 writes per packet for 250 byte packets, 36 reads/36 writes per packet updating stats for QiD takes 4 reads/4 writes

5 Objectives for ONL Router
Reproduce approximately same functionality as current hardware router routes, filters (including sampling filters), stats, plugins Extensions multicast, explicit-congestion marking Use each NPU as separate 5 port router each responsible for half the external ports xScale on each NPU implements CP functions access to control variables, memory-resident statistics updating of routes, filters interaction with plugins through shared memory simple message buffer interface for request/response

6 fanout, 10 bit copy vector, QiD, resultIndx
ONL NP Router fanout, 10 bit copy vector, QiD, resultIndx Rx (2 ME) HdrFmt (1 ME) Parse, Lookup, Copy (3 MEs) TCAM SRAM Mux Tx Queue Manager Stats Plugin SRAM xScale large scratch ring Each output has common set of QiDs Multicast copies use same QiD for all outputs QiD ignored for plugin copies large scratch ring


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