1. Prepared by Kenan BOZDAŞ
ELE413
8085 Instruction Set
Prepared by Kenan BOZDAŞ

2. Contents Registers Addressing Modes Instruction Set Classification
Deeper look at instructions

3. Registers Accumulator(A) & Processor Status Word (PSW,Flag Register)
B & C (BC)
D & E (DE)
H & L (HL, M)
Stack Pointer (SP)
Program Counter (PC)

4. Registers Accumulator
Destination for all Arithmetic & Logical operations
Dest & Source for IN & OUT instructions

5. Registers Flag Register (PSW) Flow control Status control
Cannot access bits S Z AC P CY

6. Registers B, C, D, E Can be used as an 8-bit register Or in pairs:
B & C (BC)
D & E (DE)

7. Registers H, L Can be used as an 8-bit register Or in pairs:
H & L (HL)
Or as a memory pointer (M)

8. Registers SP, PC Stack pointer is used in stack operations.
Program counter contains the address of the instruction to be executed.

9. Addressing Modes Immediate Addressing Register Addressing
Direct Addressing
Indirect Addressing

10. Addressing Modes Immediate Addressing
Data is present in the instruction.
MVI R,data (8-bit)
LXI R-R,data (16-bit)

11. Addressing Modes Register Addressing
Data is provided through the registers.
MOV Rd,Rs

12. Addressing Modes Direct Addressing I/O instructions
IN 01H
OUT 21H
Address is given in the instruction
CALL 2000H
STA 0FF00H

13. Addressing Modes Indirect Addressing
Effective address is calculated by the processor
DCR M [HL]=[HL]-1
LDAX B A=[BC]

14. Instruction Set Classification
Data Transfer (Copy) Operations
Arithmetic Operations
Logical Operations
Branching Operations
Machine Control Operations

15. Instruction Set Classification
Data Transfer(Copy) Operations
Between Registers
MOV D,L
Specific data byte to a register or a memory location
MVI C,0FAH
MVI M,00H
Between a memory location and a register
MOV M,L
Between an I/O device and the accumulator
IN 21H

16. Instruction Set Classification
Arithmetic Operations
Addition
ADD R A=A+R
ADI 03H A=A+3H
Subtraction
SUB R A=A-R
SUI 15H A=A-15H
Increment/Decrement
INR A
DCX H

17. Instruction Set Classification
Logical Operations
AND, OR, XOR
ANA R A=A&R
XRA M A=A M
Rotate
RAL
RRC
Compare
CMP R
Complement
CMA

18. Instruction Set Classification
Branching Operations
Jump
JMP addr unconditional
JNZ addr conditional
CALL
CALL addr unconditional
CC addr conditional
Return

19. Instruction Set Classification
Machine Control Operations
Halt, Interrupt, Do nothing
HLT EI
NOP

20. Deeper look at instructions
MOV R,R
MOV R,M
MOV M,R
MOV M,M (Single Memory Pointer)
MVI R,imm
MVI M,imm
MVI [addr],imm (Only via memory pointer)

21. Deeper look at instructions
LXI B, 16-bit imm. BC=16-bit imm.
LXI D, 16-bit imm. DE=16-bit imm.
LXI H, 16-bit imm. HL=16-bit imm.
LXI SP,16-bit imm. SP=16-bit imm.
LHLD 16-bit imm HL=[16-bit imm.]
SHLD 16-bit imm [16-bit imm.]=HL

22. Deeper look at instructions
LDA 16-bit addr
LDAX B (BC)
LDAX D (DE)
LDAX H (HL) (Already have MOV A,M)
STA 16-bit addr ..
STAX H (Already have MOV M,A)

23. Deeper look at instructions
INR/DCR R R=R±1, CY not altered
INR/DCR M [HL]=[HL] ±1, H nor L altered
INX/DCX Rp Rp=Rp ±1, no flags altered
DAD Rp HL=HL+Rp only CY affected
DAA Decimal Adjust not Conversion

24. Deeper look at instructions
ADD R A=A+R
ADC R A=A+R+CY
ADD M A=A+[HL]
ADC M A=A+[HL]+CY
ADI imm A=A+ 8-bit imm.
ACI imm A=A+imm.+CY
SUB R A=A-R
SBB R A=A-R-CY
SUB M A=A-[HL]
SBB M A=A-[HL]-CY
SUI imm A=A- 8-bit imm.
SBI imm A=A-imm.-CY

25. Deeper look at instructions
ANA R A=A&R
ANA M A=A&[HL]=A&M
ANI imm. A=A& 8-bit imm.
ORA R A=A||R
ORA M A=A||[HL]=A&M
ORI imm. A=A|| 8-bit imm.
XRA R A=A R
XRA M A=A [HL]=A&M
XRI imm. A=A bit imm.

26. Deeper look at instructions
CMA complement accumulator (B,C,D,E..)
CMC complement carry
STC set carry
RLC rotate A left, CY not included
RRC rotate A rigth, CY not included
RAL rotate A left through CY
RAR rotate A right through CY

27. Deeper look at instructions
CMP R or M
CPI imm. CY Z
A<R or M
A<imm. 1
A=R or M
A=imm.
A>R or M
A>imm.

28. Deeper look at instructions
JMP 16-bit addr PC=16-bit addr
JC/JNC 16-bit addr.
JZ/JNZ 16-bit addr.
JM/JP 16-bit addr.
JPE/JPO 16-bit addr.
PCHL PC=[HL]
XCHG DE=HL, HL=DE not []
XTHL TOS=HL, HL=TOS

29. Deeper look at instructions
CALL 16-bit addr. PC=16-bit addr,push stack
CC/CNC 16-bit addr.
CZ/CNZ 16-bit addr.
CM/CP 16-bit addr.
CPE/CPO 16-bit addr.

30. Deeper look at instructions
RET PC=16-bit addr, pop stack
RC/RNC
RZ/RNZ
RM/RP
RPE/RPO

31. Deeper look at instructions
Addr
FF01H ;LXI H,0100H
FF02H
FF03H
FF04H E ; MVI A,0C9H
FF05H C9
FF06H B ;LOOP: DCX H
FF07H C2 ;JNZ LOOP
FF08H
FF09H FF
FF0AH ;HLT (RST 7)