Getting Started with the MSP430 LaunchPad

Getting Started with the MSP430 LaunchPad

Agenda Introduction to Value Line Code Composer Studio
CPUX and Basic Clock Module Interrupt and GPIO TimerA and WDT+ Low-Power Optimization ADC10 and Comparator_A+ Serial Communications Grace Capacitive Touch Solution

MSP430 Released Devices

MSP430 MCUs An Introduction
Ultra-Low Power Integration World’s Lowest Power MCU Ultra-Low Power Active Mode 7 Low Power Modes Instant Wakeup All MSP430 devices are Ultra-Low Power Intelligent Analog & Digital Peripherals Peripherals operate in low power modes Minimize physical footprint and Bill of Materials Featuring FRAM, USB, RF, Capacitive Touch I/O, Metrology Engines, LCD, ADC, DAC & MORE Extensive Portfolio, Low Cost Options Easy to Get Started Find the right MCU for you 400+ devices Up 256kB Flash, 18kB RAM, 25+ package options Devices starting at $0.25 with Value Line Various levels of performance & integration Low cost and simple point of entry Complete kits $4.30 GUI-based coding & debugging tools available MSP430Ware Software and Resource Package -Incl. code examples, datasheets, user guides & more!

MSP430-Enabled Applications
Utility Metering Electricity Meters Gas Meters Flow Meters Smart Meters Wireless Applications Remote Sensors Communication Controllers RFID Consumer Electronics Portable Electronics Remote Controls Personal Care PC peripherals Portable Medical Blood Glucose Meters Thermometers Heart-Rate Monitors Implantable Devices Sensors & Security Smoke Detector Motion Detector Vibration Detector Smart Sensors Personal Health & Fitness Sports Watches Pedometers Calorimeters Dive watches Thousands of applications are enabled by MSP430 MCUs Differentiation is possible with MSP430 MCU’s Ultra-Low Power performance, high analog & digital peripheral integration, and easy-to-use tool chain. Energy Harvesting Renewable Energy Battery-less devices Solar, thermal, vibration, etc Utility Metering (eMetering) (Gas & Water smart meter) (Flow Meter) Wireless Applications - Consumer Electronics – Sensor & Security (Temperature Sensor) - (Glass Breakage Detection) Portable Medical – Blood Pressure Monitor ( - Sample entire block diagram! - Pulse Oximitry ( 5

Value Line: 16-bit performance, 8-bit price
UART Cap Touch I/O UART MSP430G25X3 SC 16KB ADC UART ADC10 MSP430G24X3 SC ADC UART ADC Comparator 8KB MSP430G24X2 SC ADC SPI/I2C MSP430G23X3 SC ADC UART 4KB SC MSP430G23X2 SC ADC Flash Size MSP430G22X2 SC ADC 2KB MSP430G22X1* SC ADC MSP430G22X3 SC ADC UART 1KB MSP430G21X2 SC ADC MSP430G21X1* SC ADC MSP430G21X3 SC ADC UART .5 KB MSP430G2001* 14-pin TSSOP/PDIP 10 GPIO 16-pin QFN 10 GPIO 20-pin TSSOP/PDIP 16 GPIO 28-pin TSSOP 24 GPIO 32-pin QFN 24 GPIO * 8-pin SOIC in development 6

Value Line Peripherals

General Purpose I/O Independently programmable Any combination of input, output, and interrupt (edge selectable) is possible Read/write access to port-control registers is supported by all instructions Each I/O has an individually programmable pull-up/pull-down resistor Some parts/pins are touch-sense enabled (PinOsc) 16-bit Timer_A3 3 capture/compare registers Extensive interrupt capabilities WDT+ Watchdog Timer Also available as an interval timer Brownout Reset Provides correct reset signal during power up and down Power consumption included in baseline current draw

Serial Communication USI with I2C and SPI support USCI with I2C, SPI and UART support Comparator_A+ Inverting and non-inverting inputs Selectable RC output filter Output to Timer_A2 capture input Interrupt capability 8 Channel/10-bit 200 ksps SAR ADC 8 external channels (device dependent) Voltage and Internal temperature sensors Programmable reference Direct transfer controller send results to conversion memory without CPU intervention Interrupt capable Some parts have a slope converter

LaunchPad Development Board
USB Emulator Connection Embedded Emulation 6-pin eZ430 Connector Crystal Pads Chip Pinouts Part and Socket P1.3 Button Power Connector LEDs and Jumpers P1.0 & P1.6 Reset Button

What is Code Composer Studio?
Integrated development environment for TI embedded processors Includes debugger, compiler, editor, simulator, OS… The IDE is built on the Eclipse open source software framework Extended by TI to support device capabilities CCSv5 is based on “off the shelf” Eclipse (version 3.7 in CCS 5.1) Future CCS versions will use unmodified versions of Eclipse TI contributes changes directly to the open source community Drop in Eclipse plug-ins from other vendors or take TI tools and drop them into an existing Eclipse environment Users can take advantage of all the latest improvements in Eclipse Integrate additional tools OS application development tools (Linux, Android…) Code analysis, source control… Linux support soon Low cost! $445 or $495

Common Tasks Creating New Projects Build options Sharing projects
Very simple to create a new project for a device using a template Build options Many users have difficulty using the build options dialog and find it overwhelming Updates to options are delivered via compiler releases and not dependent on CCS updates Sharing projects Easy for users to share projects, including working with version control (portable projects) Setting up linked resources has been simplified

Workspaces and Projects
Settings and preferences Project Source files Header files Library files Build and tool settings Source files Code and Data Link Project Source files Header Files Library files Build and tool settings Project Source files Header Files Library files Build and tool settings Link Link Header files Declarations/Defines Link Library files Code and Data A workspace contains your settings and preferences, as well as links to your projects. Deleting projects from the workspace deletes the links, not the files A project contains your build and tool settings, as well as links to your input files. Deleting files from the workspace deletes the links, not the files

Project Wizard Single page wizard for majority of users
Next button will show up if a template requires additional settings Debugger setup included If a specific device is selected, then user can also choose their connection, ccxml file will be created Simple by default Compiler version, endianness… are under advanced settings 1. Add source file is very easy, just copy

Various IDE options Free Integrated Development Environments (IDE) available Code Composer Studio Eclipse-based IDE (Compiler, debugger, linker, etc) for all TI embedded processors Unrestricted version available for $495 Free versions are available! Free 16kB code-limited version available for download Free, full-featured, 120-day trial version available IAR Embedded Workbench Strong third-party IDE offering with project management tools and editor. Includes config files for all MSP430 devices. Free versions are available! Free 4/8/16kB code-limited Kickstart version available for download Free, full-featured, 30-day trial version available GCC GNU Others? MSPGCC Free, Open source, GCC tool chain for MSP430 includes the GNU C compiler (GCC), the assembler and linker (binutils), the debugger (GDB) Tools can be used on Windows, Linux, BSD and most other flavors of Unix. Learn Other MSP430 IDE options are available! Learn 16

Lab1: Code Composer Studio
Create a new workspace Create Lab1 Project Add in temperature sense demo Compile it and run

Step 1: Create CCS workspace
Put the Lab files onto your desktop Launch CCS v5 Core Edition Select a “Workspace” location 18

Step 2: Create a CCS Project
File > New > CCS Project Project Name: Lab1 Device>Family: MSP430 Variant: MSP430G2452 Project templates and examples : Empty Project 19

Step 3: Add a File to the CCS Project
Project > Add Files Navigate to Lab source folder And select : Temperature_Sense_Demo.c 20

CCS Window – C/C++ Perspective Overview
Independent Debug and C/C++ Project Perspectives 1-click project Debug Project View List of all Projects Project Outline Shortcut to project parts Problems View Information, Warnings, Errors Console Build Information Code Window Real-time breakpoints, Syntax highlighting 21 21 21

CCS Window – Debug Perspective Overview
Independent Debug and C/C++ Project Perspectives 1-click project Debug Highly configurable window layout User preferences Plugin support Target control Start Stop Halt Stepping Stack Trace Real-time, in-system MSP430 information Register access Flash, RAM, Info segment access Disassembly view Program Size Info Code Window Real-time breakpoints, Syntax highlighting 22 22 22

Step 4: Build & Debug a CCS Project
Click the “BUG” to build the code & launch the debugger 23 23

Step 5: Run, Terminate a CCS Project
Perspectives 24

MSP430G2xx Structure 0.1uA power down 0.8uA standby mode 220uA / 1MIPS
Ultra-low Power 0.1uA power down 0.8uA standby mode 220uA / 1MIPS <1us clock start-up <50nA port leakage Zero-power brown-out reset (BOR) Ultra-Flexible 0.5k-16kB In-System Programmable (ISP) Flash 16-bit Timer SPI, I2C 10bit ADC Embedded emulation Clock FLASH RAM . . . MAB 16 RISC CPU 16-bit JTAG/Debug MDB 16 . . . ACLK Digital Analog Peripheral Peripheral SMCLK 6

16-bit RISC CPU Deep single-cycle register file 4 special purpose
12 general purpose No accumulator bottleneck RISC architecture 27 core instructions 24 emulated instructions 7 address modes Atomic memory-to-memory addressing Bit, byte and word processing Constant generator Modern 16-bit RISC CPU is optimized for modern programming techniques. The MSP430’s architecture provides the flexibility of 16 fully addressable, single-cycle 16-bit CPU registers. The large CPU register file eliminates what is typically a single working file or accumulator bottleneck. The CPU registers are fully accessible including the program counter, stack pointer, status register and 12 working registers. The CPU also integrates a constant generator to automatically generate the six most used immediate values. The constant generator has the effect of reducing code size by generator this common constants (or literals) using hardware, eliminating what would be immediate values embedded in code. The modern Reduced Instruction Set (RISC) design of the CPU offers versatility through simplicity using only 27 easy-to-understand instructions and seven consistent addressing modes. All memory spaces – Flash, RAM, peripherals and CPU registers - use the exact same instructions and addressing modes. All instructions can also be used in a byte format as well. The MSP430 is an orthogonal design because all instructions are used consistently though all areas of the device. Up to 8 MIPS of performance is available today, with more planned. The result is a 16-bit, ultra-low power CPU that has more effective processing throughput, is smaller in size, and more code-efficient than other 8/16-bit microcontrollers. When using the MSP430, this results in programmers writing less lines of code. Now it’s possible to develop ultra-low power, high-performance applications at a fraction of the code size previously possible. 7

Interrupt Vector Table 8-bit Special Function Registers
Memory Map G2452 shown Flash programmable via JTAG or In-System (ISP) ISP down to 2.2V. Single-byte or Word Main memory: 512 byte segments (0-n). Erasable individually or all Information memory: 64 byte segments (A-D) Section A contains device-specific calibration data and is lockable Programmable Flash Memory Timing Generator 0FFFFh 0FFE0h Interrupt Vector Table Flash/ROM Information Memory RAM 16-bit Peripherals 8-bit Peripherals 8-bit Special Function Registers FFDFh 0E00h 010FFh 01000h 02FFh 0200h 01FFh 0100h The Flash memory of the MSP430 can be programmed very fast using several different methods. The Flash is segmented into 512B main memory segments with two additional 128B information memory segments. The only difference between main and information memory is size – code and data can be located anywhere. The total number of main memory segments depends on the device - for example, a 4KB device has eight main memory segments. ISP F2xx Flash is reduced from 2.7V to 2.2V - This 0.5V reduction has a significant impact on an application that is powered by two common alkaline batteries with a useful operating range from 3.3V-1.8V. Considering that the alkaline discharge is almost perfectly linear, an ISP reduction from 2.7V to 2.2V represents almost a 50% increase in the application time ISP and can be useful. The programming time has been reduced to as little as 17us per byte and the mass erase time reduced to 20ms. Faster programming/erase combined with smaller 64 byte information segments and interruptible ISP allows embedded Flash to replace external EEPROM in most cases. This capability saves cost and board real estate. 0FFh 010h 0Fh 0h 28

Clock System Very Low Power/Low Frequency Oscillator (VLO)
4 – 20kHz (typical 12kHz) 500nA standby 0.5%/°C and 4%/Volt drift Crystal oscillator (LFXT1) Programmable capacitors Failsafe OSC_Fault Minimum pulse filter Digitally Controlled Oscillator (DCO) 0-to-16MHz + 3% tolerance Factory calibration in Flash To support the lowest power consumption and performance on-demand, the enhanced basic clock system (BCS+) on the MSP430F2xx (like all other MSP430 clock systems) typically provides two clocks. A low frequency auxiliary clock (ACLK) is typically sourced directly from a common 32 kHz watch crystal and is used for always-on low power peripherals. A high-speed clock is generated on-chip from an instant-on digitally controlled oscillator (DCO) used by the CPU and other peripherals. To save power, an application’s interrupt events steer the usage of the DCO only when required. The majority of the application’s life is spent in standby mode with high-performance available on-demand and only when required. Reduced standby power consumption also known as real-time clock (RTC) or LPM3 mode current has been reduced to less than 1 micro amp. This power consumption can be achieved using an external 32kHz crystal or the VLO. On PUC, MCLK and SMCLK are sourced from DCOCLK at ~1.1 MHz. ACLK is sourced from LFXT1CLK in LF mode with an internal load capacitance of 6pF. 29

G2xxx - No Crystal Required DCO
// Setting the DCO to 1MHz if (CALBC1_1MHZ ==0xFF || CALDCO_1MHZ == 0xFF) while(1); // Erased calibration data? Trap! BCSCTL1 = CALBC1_1MHZ; // Set range DCOCTL = CALDCO_1MHZ; // Set DCO step + modulation Note that the line “DCOCTL = 0” has been added to show a best-practice approach of changing the frequency. Otherwise, depending on the current DCO settings and the target frequency constants, it would be possible to temporarily exceed the devices maximum operating frequency. G2xx1 devices have 1MHz DCO constants only. Higher frequencies must be manually calibrated G2xx2 & G2xx3 have all 4 constants + calibration values for the ADC & temperature sensor 30

Run Time Calibration of the VLO
Calibrate the VLO during runtime Clock Timer_A runs on calibrated 1MHz DCO Capture with rising edge of ACLK/8 from VLO fVLO = 8MHz/Counts Code library on the web (SLAA340)

System MCLK & Vcc Match needed clock speed with required Vcc to achieve the lowest power External LDO regulator required Unreliable execution results if Vcc < the minimum required for the selected frequency All G2xxx device operate up to 16MHz

Lab2: Basic Clock Configure
Import Lab2 project to Workspace Setup DCO = 1MHz Use DCO/8 as MCLK, LED Blink Use VLO/8 as MCLK, LED Blink

Reference User’s Guide, Datasheet & Schematic
Lab 2: // Configure Basic Clock BCSCTL1 = __________; // Set range DCOCTL = ___________;// Set DCO step + modulation BCSCTL3 |= LFXT1S_2;// Set LFXT1 // Configure MCLK BCSCTL2 |= ________ + DIVM_3; // Set MCLK Reference User’s Guide, Datasheet & Schematic

Lab 2: BCSCTL2 in 2xx User Guide

Lab 2: BCSCTL2 in MSP430G2453 head file

Interrupts and the Stack
Entering Interrupts Any currently executing instruction is completed The PC, which points to the next instruction, is pushed onto the stack The SR is pushed onto the stack The interrupt with the highest priority is selected The interrupt request flag resets automatically on single-source flags; Multiple source flags remain set for servicing by software The SR is cleared; This terminates any low-power mode; Because the GIE bit is cleared, further interrupts are disabled The content of the interrupt vector is loaded into the PC; the program continues with the interrupt service routine at that address

Vector Table Interrupt Source Interrupt Flag System Interrupt
Word Address Priority Power-up External Reset Watchdog Timer+ Flash key violation PC out-of-range PORIFG RSTIFG WDTIFG KEYV Reset 0FFFEh 31 (highest) NMI Oscillator Fault Flash memory access violation NMIIFG OFIFG ACCVIFG Non-maskable Non-maskable Non-maskable 0FFFCh 30 0FFFAh 29 0FFF8h 28 Comparator_A+ CAIFG maskable 0FFF6h 27 Watchdog Timer+ WDTIFG 0FFF4h 26 Timer_A3 TACCR0 CCIFG 0FFF2h 25 TACCR1 CCIFG TAIFG 0FFF0h 24 0FFEEh 23 0FFECh 22 ADC10 ADC10IFG 0FFEAh 21 USI USIIFG USISTTIFG 0FFE8h 20 I/O Port P2 (2) P2IFG.6 P2IFG.7 0FFE6h 19 I/O Port P1 (8) P1IFG.0 to P1IFG.7 0FFE4h 18 0FFE2h 17 0FFE0h 16 Unused 0FFDEh to 0FFCDh 15 - 0

ISR Coding #pragma vector=WDT_VECTOR __interrupt void WDT_ISR(void) { IE1 &= ~WDTIE; // disable interrupt IFG1 &= ~WDTIFG; // clear interrupt flag WDTCTL = WDTPW + WDTHOLD; // put WDT back in hold state BUTTON_IE |= BUTTON; // Debouncing complete } #pragma vector - the following function is an ISR for the listed vector _interrupt void - identifies ISR name No special return required

Controlling GPIO Ports
GPIO Register GPIO Code Example Input Register PxIN Output Register PxOUT Direction Register PxDIR Function Select PxSEL Interrupt Edge PxIES Interrupt Enable PxIE Interrupt Flags PxIFG For GPIO Int Function Select PxREN Function Select PxSEL2 P1DIR |= BIT4; P1SEL |= BIT4; P1DIR |= BIT0; P1OUT |= BIT0; 26

Pin Muxing Each pin has multiple functions
Register bits select pin function See device specific datasheet

Lab3: GPIO Lab3 Setup P1.3 to Button Setup P1.0 to LED control
LED toggle with Button

Lab 3: P1DIR |= BIT0; // Set P1.0 to output direction
P1IES |= BIT3; // P1.3 Hi/lo edge _____ &= ~BIT3; // P1.3 IFG cleared _____ |= BIT3; // P1.3 interrupt // Port1 interrupt service routine #pragma vector = __________ __interrupt void Port_1(void) // Port1 interrupt service routine P1OUT ^= BIT0; // P1.0 = toggle ______ &= ~BIT3; // P1.3 IFG cleared

Timer_A Asynchronous 16-Bit timer/counter
Continuous, up-down, up count modes Multiple capture/compare registers PWM outputs Interrupt vector register for fast decoding Can trigger DMA transfer On all MSP430s 70

Timer_A Counting Modes
Stop/Halt Timer is halted Continuous Timer continuously counts up 0FFFFh 0h Up Timer counts between 0 and CCR0 Up/Down Timer counts between 0 and CCR0 and 0 0FFFFh CCR0 0h CCR – Count Compare Register 71

Timer_A Interrupts TACCR0 CCIFG TACCR1 CCIFG TACCR2 CCIFG TAIV
The Timer_A Capture/Comparison Register 0 Interrupt Flag (TACCR0) generates a single interrupt vector: TACCR0 CCIFG TIMERA0_VECTOR No handler required TACCR1, 2 and TA interrupt flags are prioritized and combined using the Timer_A Interrupt Vector Register (TAIV) into another interrupt vector TACCR1 CCIFG TACCR2 CCIFG TAIV TIMERA1_VECTOR TAIFG Your code must contain a handler to determine which Timer_A1 interrupt triggered 72

TAIV Handler Example Source TAIV Contents No interrupt pending 0
TACCR1 CCIFG 02h TACCR2 CCIFG 04h Reserved 06h Reserved 08h TAIFG 0Ah Reserved 0Ch Reserved 0Eh TAIV x x x x 15 #pragma vector = TIMERA1_VECTOR __interrupt void TIMERA1_ISR(void) { switch(__even_in_range(TAIV,10)) case 2 : // TACCR1 CCIFG P1OUT ^= 0x04; break; case 4 : // TACCR2 CCIFG P1OUT ^= 0x02; break; case 10 : // TAIFG P1OUT ^= 0x01; break; } 0xF814 add.w &TAIV,PC 0xF818 reti 0xF81A jmp 0xF824 0xF81C jmp 0xF82A 0xF81E reti 0xF820 reti 0xF822 jmp 0xF830 0xF824 xor.b #0x4,&P1OUT 0xF828 reti 0xF82A xor.b #0x2,&P1OUT 0xF82E reti 0xF830 xor.b #0x1,&P1OUT 0xF834 reti IAR C code Assembly code 73

Timer_A PWM Example Completely automatic
TEST Vcc P2.5 Vss XOUT XIN RST P2.0 P2.1 P2.2 TA2/P1.7 P1.6 P1.5 P1.4 P1.3 TA1/P1.2 P1.1 P1.0 P2.4 P2.3 MSP430F11x1 CCR0 CCR1 CCR2 Completely automatic Independent frequencies with different duty cycles can be generated for each CCR Code examples on the MSP430 website 74

Direct Hardware Control With Timer_A
Example: ADC12 TAR TACCR1 = 557 65536 2s TAIFG: Reference & ADC on 17ms TACCR1: Ref delay / ADC trigger ADC12IFG: Process ADC result Ref/ADC Off CPU Active Mode UART ... 75

Found on all MSP430 devices Two modes
WDT+ Module: Overview Found on all MSP430 devices Two modes Watchdog Interval timer Access password protected Separate interrupt vectors for POR and interval timer Sourced by ACLK or SMCLK Controls RST/NMI pin mode WDT+ adds failsafe/protected clock

Watchdog Timer Failsafe Operation
If ACLK / SMCLK fail, clock source = MCLK (WDT+ fail safe feature) If MCLK is sourced from a crystal, and the crystal fails, MCLK = DCO (XTAL fail safe feature) If ACLK or SMCLK fail while sourcing the WDT+, the WDT+ clock source is automatically switched to MCLK. In this case, if MCLK is sourced from a crystal, and the crystal has failed, the FLL+ fail-safe feature will activate the DCO and use it as the source for MCLK. When the WDT+ module is used in interval timer mode, there is no fail-safe feature for the clock source. WDT clock source … 53

WDT: Common Design Issues
Program keeps resetting itself! Program acting wacky – how did execution get to that place? Try setting interrupt near beginning of main() to see if code is re-starting CPU seems to freeze before even getting to first instruction Is this a C program with a lot of initialized memory? Generally can occur only with very large-memory versions of the device Solution: Use __low_level_init() function, stop watchdog there void main(void) { WDTCTL = WDTPW+WDTHOLD; // Stop the dog . }

WDT: Interval Timer Function
No PUC issued when interval is reached If WDTIE and GIE set when interval is reached, a WDT interval interrupt generated instead of reset interrupt Selectable intervals

Lab4: Timer and Interrupts
Use TimerA to implement Lab2 Configure Timer_A3 Count Cycle: 5100 Occurs a interrupt when TAR =100

Lab 4: // Configure TimerA
TACTL = __________________; // Source: ACLK, UP mode CCR0 = 5100; //Timer count 5100 CCR1 = 100; //Timer count 100 CCTL0 = CCIE; //CCR0 interrupt enabled CCTL1 = CCIE; //CCR1 interrupt enabled // Timer A0 interrupt service routine #pragma vector = __________ __interrupt void Timer_A0(void) // Timer A1 interrupt service routine #pragma vector = __________ __interrupt void Timer_A1(void)

Ultra Low Power Feature

Ultra-Low Power Is In Our DNA
MSP430 designed for ULP from ground up Peripherals optimized to reduce power and minimize CPU usage Intelligent, low power peripherals can operate independently of CPU and let the system stay in a lower power mode longer Multiple operating modes 100 nA power down (RAM retained) 0.3 µA standby 110 µA / MIPS from RAM 220 µA / MIPS from Flash Instant-on stable high-speed clock V single-supply operation Zero-power, always-on BOR <50nA pin leakage CPU that minimizes cycles per task Low-power intelligent peripherals ADC that automatically transfers data Timers that consume negligible power 100 nA analog comparators Performance over required operating conditions Ultra-low power is in our DNA: As the world’s lowest power microcontroller, the MSP430 was designed from the ground up with low power in mind. We’ve woven low power into every aspect of the MSP430 from the architecture, to the smart integrated peripherals, to our easy-to-use tool chain. The MSP430’s power consumption is unmatched in the industry – it’s so low, it’s ridiculous. * MSP430 is the leading ultra-low power MCU, providing faster wake-up (“burst mode operation”), low-power oscillators and memory designs, lowest power analog components, real-time clock operations down to 1uA and less. * Originally designed with low power in mind, the MSP430 offers a wide range of integrated peripherals that allow designers to create cutting edge, energy-efficient and ultra-low power applications quickly and easily. The MSP430 is designed specifically for battery-power measurement applications. The clock system allows many low-power modes with no compromise in performance. Because of a wide operating voltage range, the MSP430 can often be powered directly from a battery. The MSP430 BOR implementation is truly ultra-low power, in the nA range and practical for all applications. The MSP430 BOR function is so low power that this functions is always active, even in all low-power modes. This ensures the most reliable performance possible. Competitor’s BOR protection is in the µA range and not usable in ultra-low power battery powered applications, which leave the application vulnerable to BOR conditions. The port pins have very low leakage when connected to external signals. This is very important as many MCUs have several µA of input leakage on each port pin. The overall MSP430 architecture including a 16-bit CPU with 16 registers and 16-bit data and address buses minimize power-consuming fetches to memory. A fast vectored-interrupt structure reduces the need for wasteful CPU software flag polling. Many intelligent peripheral features are provided that allows tasks to be completed independent of the CPU and far more efficiently. These include the autoscan feature in the ADC12 and the available DMA. With the intelligent peripherals, the CPU does not need to be over clocked to deliver the required system performance. Always review manufactures worst case or maximum values. Many specifications are dramatically effected over temperature.

Ultra-Low Power Activity Profile
Active Average Low Power Mode The MSP430 is designed specifically for battery-powered measurement applications. The average system power consumption is the absolute lowest, without compromise in performance. The system enters low power modes and remains there as long as possible in an ultra-low power standby mode and is awoke only to service interrupts as fast as possible. (<1us wakeup possible to exit low power modes and enter active mode) Multiple oscillators are utilized to provide both an ultra-low power standby mode, and “on-demand” high-performance processing. The clock system is very flexible and allows the MSP430 to operate from different clock sources depending on the application’s needs. A low frequency Auxiliary Clock (ACLK) is driven directly from a common 32KHz watch crystal with no additional external components or sourced by internal low power oscillators. The ACLK enables the MSP430’s ultra-low-power standby mode (LPM3) and an embedded real-time clock function. In LPM3, the MSP430 typically consumes in the ~0.7uA range. The integrated high-speed DCO can source the master clock (MCLK) used by the CPU and high-speed peripherals. By design, the DCO is active and fully stable in less than 6 µs with no intermediate steps. This enables “instant on” high-performance processing – no long start-up for a second crystal or 2-speed start-up required. Because the DCO is digitally adjustable with software and hardware, stability over time and temperature are assured. To service interrupt driven events, the software efficiently uses the 16-bit RISC CPU’s performance in very short, “burst” intervals. Transition from standby to full active is less than 6us (Down to <1us in 2xx series). This results in a combination of ultra-low power consumption and very high-performance immediately when needed. To support non-low power applications, a high-speed crystal up to 16Mhz can also be used. The device can also operate with no external crystal using only the internal DCO Minimize active time Maximize time in Low Power Modes Interrupt driven performance on-demand with <1μs wakeup time Always-On, Zero-Power Brownout Reset (BOR)

MSP430 Low Power Modes LPM0 LPM4 LPM3 CPU Off DCO on ACLK on Active
All Clocks Off 100nA <1µs LPM0 LPM4 RAM/SFR retained <1µs BOR is enabled in all modes Stand-by DCO off ACLK on 0.3µA First explain why LPM1 and LPM2 are not included in discussion. – we are only covering the most used low power modes. We also now include LPM3.5 and 4.5, which are new in our 5xx series. LPM0 – (CPU off mode) Only the CPU is off, all other clocks and peripherals are available – Typical current consumption ~45uA LPM3 – (Standby mode) Lowest power mode with self wakeup and full RAM retention – Typical current consumption ~0.7uA LPM4 - (Shutdown mode) All clocks and peripherals are disabled. No self wakeup, but offers full RAM retention. Wake up with external interrupt sources = Typical current consumption ~100nA NEW LPM3.5 and 4.5  Voltage regulator of the MCU is disabled. All RAM and register contents are lost, as well as I/O configuration. Wakeup from LPM4.5 is possible via power sequence, RST, or from specific I/O. Offers the lowest possible power consumption available, as no clock sources are active during LPM4.5. (Power consumption <100nA). Lower power than LPM4, but does not offer RAM retention. Wakeup from LPM3.5 is possible through power sequence, RST, RTC, or specific I/O. LPM3.5 is similar to LPM4.5, but provides the additional capability of having a Real Time Clock mode available, which allows self wakeup from RTC events. (Power consumption >100nA). Power consumption similar to LPM4, but offers self wakeup but no RAM retention. Functionality with the various Low Power Modes ranges from having just the CPU off, to having Everything Off except the Core Power savings ranges from 0.1uA to ~55uA Discussion of LPM will primarily center on LPM3 and LPM4. In addition to power, another key care about is time. One of the common phrases associated with the MSP430 is performance on demand. MSP430 can wake up from low power modes and back into active mode in as little as <1us. Additional cost of LPM3.5 and 4.5 is return path through BOR/POR/PUC BOR is enabled in all low power modes – this essential functionality is accounted for in all of our spec’d current consumption numbers. Many competitors leave this functionality out in their spec’d values… Adding BOR functionality in competitor MCUs can sometimes double overall current consumption due to the need to enable necessary fixed voltage references. BOR is important especially in battery powered applications. BOR ensures that your software does not execute until the power source is stable and within the correct voltage threshold. This prevents any erroneous code execution and runaway code. 3V, 25C, typical values in datasheet LPM3 RTC function LCD driver RAM/SFR retained Specific values vary by device 62

Low Power Mode Configuration
R2/SR Reserved C SCG1 SCG0 Z N GIE CPU OFF OSC V Active Mode ~ 250uA LPM ~ 35uA LPM ~ 0.8uA LPM ~ 0.1uA bis.w #CPUOFF,SR ; LPM0 LPM in Assembly 34

Low Power Modes In Stack
ORG 0F000h RESET mov.w #300h,SP mov.w #WDT_MDLY_32,&WDTCTL bis.b #WDTIE,&IE1 bis.b #01h,&P1DIR Mainloop bis.w #CPUOFF+GIE,SR xor.b #01h,&P1OUT jmp Mainloop WDT_ISR bic.w #CPUOFF,0(SP) reti ORG 0FFFEh DW RESET ORG 0FFF4h DW WDT_ISR Item1 SP Item2 Item1 Item2 PC SP SR=0018 Item1 Item2 PC SR=0008 Item1 SP Item2 PC SR LPM in C 35

ULP is Easy! Using our Low Power Modes are easy void main(void) {
WDT_init(); // initialize Watchdog Timer while(1) __bis_SR_register(LPM3_bits + GIE); // Enter LPM3, enable interrupts activeMode(); // in active mode. Do stuff! } #pragma vector=WDT_VECTOR __interrupt void watchdog_timer (void) __bic_SR_register_on_exit(LPM3_bits); // Clear LPM3 bits from 0(SR), Leave LPM3, enter active mode

10-yr Embedded Real-Time Clock
= LPM3 + RTC_Function 0.80µA + 250µA * 100µs µs 0.80µA µA = 0.83µA // Partial RTC_Function incrementseconds(); incrementminutes(); incrementhours(); // 1mA 100µA The MSP430’s <1uA ultra-low power stand-by mode – or LPM3 – capability allows and embedded real-time clock function to be added to any application. In this example an MSP430F20x1 system normally in LPM3 at ~0.8uA. Operating in LPM3 the watch-crystal oscillator (ACLK), a timer, and all interrupts are active. Once every second, the timer clocked by ACLK overflows and interrupts the CPU which automatically starts the DCO. The CPU updates software based clock registers operating from the fast DCO – not the slower ACLK. The update of the clock registers takes less than 100us. Because the active duty cycle for the embedded real-time clock function is so low - 100/ the incremental current consumption is only 30nA for the function. 10µA 1µA Time 66

Low-Power Operation Power-efficient MSP430 apps:
Minimize instantaneous current draw Maximize time spent in low power modes The MSP430 is inherently low-power, but your design has a big impact on power efficiency Proper low-power design techniques make the difference “Instant on” clock

Move Software Functions to Peripherals
MCU P1.2 // Endless Loop for (;;) { P1OUT |= 0x04; // Set delay1(); P1OUT &= ~0x04; // Reset delay2(); } // Setup output unit CCTL1 = OUTMOD0_1; _BIS_SR(CPUOFF); 100% CPU Load Zero CPU Load 47

Power Manage Internal Peripherals
Comparator_A P1OUT |= 0x02; // Power divider CACTL1 = CARSEL + CAREF_2 + CAON; // Comp_A on if (CAOUT & CACTL2) P1OUT |= 0x01; // Fault else P1OUT &= ~0x01; P1OUT &= ~0x02; // de-power divider CACTL1 = 0; // Disable Comp_A 48

Power Manage External Devices
0.01uA = Shutdown 20uA = Active 0.06uA = Average 1uA = Quiescent 1uA = Active 1uA = Average Op-amp with shutdown can be 20x lower total power 49

Unused Pin Termination
Digital input pins subject to shoot-through current Input voltages between VIL and VIH cause shoot-through if input is allowed to “float” (left unconnected) Port I/Os should Driven as outputs Be driven to Vcc or ground by an external device Have a pull-up/down resistor 71 71

Lab5: Low Power Mode Lab5 Optimize Lab4 to implement LPM

Lab 5: Enter Low Power Modes with just 1 line of code!
_BIS_SR(_________);//Enter Low Power Mode;

Direct Transfer Controller Data Transfer Controller
Fast Flexible ADC10 10-bit 8 channel SAR ADC 6 external channels Vcc and internal temperature 200 ksps+ Selectable conversion clock Autoscan Single Sequence Repeat-single Repeat-sequence Internal or External reference Timer-A triggers Interrupt capable Data Transfer Controller (DTC) Auto power-down Direct Transfer Controller Data Transfer Controller

Sample Timing Reference must settle for <30uS Selectable hold time
13 clock conversion process Selectable clock source ADC10OSC (~5MHz) ACLK MCLK SMCLK

Autoscan + DTC Performance Boost
Data2 Data1 Data0 ADC DTC AUTO // Software Res[pRes++] = ADC10MEM; ADC10CTL0 &= ~ENC; if (pRes < NR_CONV) { CurrINCH++; if (CurrINCH == 3) CurrINCH = 0; ADC10CTL1 &= ~INCH_3; ADC10CTL1 |= CurrINCH; ADC10CTL0 |= ENC+ADC10SC; } // Autoscan + DTC _BIS_SR(CPUOFF); Fully Automatic 70 Cycles / Sample

Comparator_A References usable internally and externally
Low-pass filter selectable by software Input terminal multiplexer One interrupt vector with enable

Comparator-Based Slope ADC
10-bit+ accuracy Resistive sensors Very low cost App note SLAA038 V t_x = R_x x C x ln CAREF Vcc . . . t_NTC R_NTC = 10k x t_10k

Example: Thermistor RREF = 10K, RM = NTC VCAREF = VCC*e(-t/RC)
Relationship simplifies to single multiply & divide operations t_NTC V CAREF C x ln Vcc t_NTC R_NTC R_NTC = 10k x = 10k t_10k t_10k V CAREF C x ln Vcc

Timer Triggers – Low-Power
Memory ADC // Interrupt CPU cycles ; MSP430 ISR to start conversion BIS #ADC12SC,&ADC12CTL0 ; Start conversion RETI ; Return ; Timer triggered interrupts – no software wait loops 64

Selecting an MSP430 ADC Voltage range to be measured?
Max frequency for AIN? How much resolution? Differential inputs? Reference range? Multiple channels?

Lab6: ADC10 Measure internal temperature Additional CCS features

Lab 6: //Configure ADC10 // Choose ADC Channel as Temp Sensor
ADC10CTL1 = _______ + ADC10DIV_3; //Choose ADC Ref sourceCCTL1 ADC10CTL0 = _______ + ADC10SHT_3 + REFON + ADC10ON +ADC10IE;

USI MSP430G2xx1/2 devices Variable length shift register Supports I2C
START/STOP detection SCL held after START SCL held after counter overflow Arbitration lost detection Supports SPI 8/16-bit Shift Register MSB/LSB first Flexible Clocking Interrupt Driven 83

USI for Data I/O Data shift register: up to 16 bits supported
Number of bits transmitted and received is controlled by a bit counter Transmit and Receive is simultaneous Data I/O is user-defined: MSB or LSB first Bit counter automatically stops clocking after last bit & sets flag No data buffering needed 84

USI Reduces CPU Load for SPI
//Shift16_inout_Software SR = DATA; for (CNT=0x10;CNT>0;CNT--) { P2OUT &= ~SDO; if (SR & 0x8000) P2OUT |= SDO; SR = SR << 1; if (P2IN & SDIN) SR |= 0x01; P2OUT |= SCLK; P2OUT &= ~SCLK; } // Shift16_inout_USI USISR |= DATA; USICNT |= 0x10; 10 Cycles I2C Slave has as little as 4us from clock edge to data Traditional software-only solution allows time for little else USI hardware enables practical and compliant I2C Code on MSP430 website 425 Cycles 85

USCI Designed for Ultra-Low Power: Auto-Start from any Low-Power Mode
Two Individual Blocks: USCI_A: UART or SPI USCI_B: SPI or I2C Double Buffered TX/RX Baudrate/Bit Clock Generator: Auto-Baud Rate Detect Flexible Clock Source RX glitch suppression DMA enabled Error Detection Recommended USCI initialization/re-configuration process is shown in your workbook. 88

USCI Enhanced Features
New standard MSP430 serial interface Auto clock start from any LPMx Two independent communication blocks Asynchronous communication modes UART standard and multiprocessor protocols UART with automatic Baud rate detection (LIN support) Two modulators support n/16 bit timing IrDA bit shaping encoder and decoder Synchronous communication modes SPI (Master & Slave modes, 3 & 4 wire) I2C (Master & Slave modes) 89

USCI Baudrate Generator
Oversampling Baud Rate Generation Two Modulators: UCBRSx and UCBRFx select modulation pattern RX sampled using BITCLK16 90

Value Line Communication Modules
USI USCI Universal Serial Communication Interface G2xx1/2 Universal Serial Interface G2xx3 Two modulators; supports n/16 timings Auto baud rate detection IrDA encoder & decoder Simultaneous USCI_A and USCI_B (2 channels) - - - Two SPI (one each on USCI_A and USCI_B) Master and slave modes 3 and 4 wire modes - One SPI available - Master and slave modes - Simplified interrupt usage Up to 400kbps - SW state machine needed U A R T S P I I 2 C 82

Low-Overhead UART Implementation
100% hardware bit latching and output Full speed from LPM3 and LPM4 Low CPU Overhead App Note SLAA078 on web 76

Software UART Implementation
A simple UART implementation, using the Capture & Compare features of the Timer to emulate the UART communication Half-duplex and relatively low baud rate (9600 baud recommended limit), but 2400 baud in our code (1 MHz DCO and no crystal) Bit-time (how many clock ticks one baud is) is calculated based on the timer clock & the baud rate One CCR register is set up to TX in Timer Compare mode, toggling based on whether the corresponding bit is 0 or 1 The other CCR register is set up to RX in Timer Capture mode, similar principle The functions are set up to TX or RX a single byte (8-bit) appended by the start bit & stop bit Application note:

GraceTM Grace™ A free, graphical user interface that generates source code and eliminates manual peripheral configuration Introduce, Feel free to ask any questions! Brand new software plugin that we’ve released for Code Composer Studio, TI’s eclipse based IDE Grace is a brand new way of programming and developiong on microcontroller devices, focusing on providing a streamlined way of configuring the many integrated peripherals of MSP430 devices, allowing developers to enable and configure peripherals quickly so they can focus on the more important application layer. is always focused on making it easy… First eZ430 in 2006, all the way to LaunchPad For the next hour or so, I’d like to give a brief introduction to Grace and then we can do a live demonstration…

Visually Enable & Configure MSP430 Peripherals
Developers can interface with buttons, drop downs, and text fields to effortlessly navigate high above low-level register settings Grace generates fully commented C code for all F2xx and G2xx Value Line Microcontrollers from MSP430 First and foremost, Grace allows users to abstract from the bits and bytes of low-level register settings for the various peripherals. As you will see in the live demo, this is the Grace welcome screen, or home screen. This shows developers all of the various peripherals that are available within the MSP430 device. What’s cool about this functionality, is that Grace will modify and customize this interactive block diagram automatically, based on the MSP430 device you’re working on! Automatically, developers understand what peripherals are available and at their disposal! The blue blocks indicate that a particular block can be interacted with. In this screenshot, I’m working on my MSP430F2274 device, which is the exact device that’s integrated in our eZ430-RF2500 kit, which is one of our easy-to-use microcontroller kits with RF capability. Grace automatically knows that this device includes a 10-bit ADC, OpAmp, GPIO ports, WDT, 16-bit timers, and serial communication interface, and has highlighted those blocks in blue. I can then simple click on the blocks where I can enable that particular peripheral in a single click. With this simple GUI, Grace allows developers to enable and configure their peripherals in just a few minutes, rather than spend hours doing the exact same thing… Normally what would have taken minutes, now takes seconds Automatically see time reduction.

TI Confidential – NDA Restrictions
What is Grace? Grace – Graphical Code Engine Is: Generates MSP430 peripheral initialization code in CCSv4 Enable a new user to have running program in 15 minutes Heavy emphasis on ease of use Currently in “Public Beta” stage Will extend to cover all MCU devices Is not: Graphical application builder 01/26/2011 TI Confidential – NDA Restrictions 98

Project Structure and Build Flow
Application C/C++ Source Files “xxxxx.cfg” This is the device peripheral configuration file and is edited with the graphical Grace view. “src” Folder Automatically generated inside the “Debug” or “Release” folder. Contains MSP430 C-code that initializes all configured peripherals. Final Executable MSP430 Output File C/C++ Compiler Linker 01/26/2011 TI Confidential – NDA Restrictions 99

User Code Skeleton Example
You know this one… /* * ======== Standard MSP430 includes ======== */ #include <msp430.h> * ======== Grace related includes ======== #include <ti/mcu/msp430/csl/CSL.h> * ======== main ======== int main(int argc, char *argv[]) { // Activate Grace-generated configuration CSL_init(); __enable_interrupt(); // Set GIE // >>>>> Fill-in user code here <<<<< return (0); } Master include file for all Grace-related content Performs all Grace-configured peripheral setup User code from here… 01/26/2011 TI Confidential – NDA Restrictions 100

Grace – Adding a Peripheral
Right-click on the peripheral and select “Use” All blocks shaded blue can be configured 01/26/2011 TI Confidential – NDA Restrictions 101

How to tell a peripheral is added?
Look at the bottom left corner of the peripheral on the CSL view, it will show a checkmark if the peripheral is initialized. 01/26/2011 TI Confidential – NDA Restrictions 102

Grace – Navigation Left-click on a peripheral to navigate to its detail view Use home button to go back to the top-level device view Forward/backward buttons are available as well 01/26/2011 TI Confidential – NDA Restrictions 103

Grace – Configuring a Peripheral
Each peripheral has 4 different representations: “Overview,” “Basic User”, “Power User”, “Registers” You can edit any of the them, they are all connected Validate the current config by clicking “Refresh” 01/26/2011 TI Confidential – NDA Restrictions 104

Grace – Removing a Peripheral
Right-click on the peripheral and select “Stop Using” 01/26/2011 TI Confidential – NDA Restrictions 105

Lab8: Grace Use Grace to configure all the required peripherals
To do Lab3 again Enter LPM4

Lab 8: step by step Disable the Watchdog timer Configure the DCO to run off the internal pre-calibrated 8MHz constants Setup the LaunchPad’s S2 button for interrupt operation Enter LPM4 in the main() function Provide a button interrupt handler that clears the IFGs and wakes up the MCU upon return Toggle between the red LED in main() Enter LPM4 in the main() again 01/26/2011 TI Confidential – NDA Restrictions 107

What is Capacitive Touch?
A change in Capacitance … When a conductive element is present - Finger or stylus Add C3 and C4, resulting in an increase in capacitance C1 + C2 + C3||C4 This becomes part of the free space coupling path to earth ground When the dielectric (typically air) is displaced Thick gloves or liquid results in air displacement and change in dielectric Capacitance is directly proportional to dielectric, capacitance (C2) increases (air ~1, everything else > 1) Capacitive touch sensing monitors the capacitance of an element and identifies a change in capacitance between the ‘touched’ and ‘untouched’ capacitance. In most cases the interaction is with a conductive object (finger or stylus) which impacts C3 and C4 as well as the coupling to earth ground. In applications that do not involve a conductive object of the conductive object is kept relatively far away from the sensor, the change in capacitance of C2 can be monitored as the dielectric changes.

MSP430 Capacitive Touch Options
< 3uA/Button Pin oscillator method (PinOsc with internal RO) No external components required Timer used Currently MSP430G2xx2 and MSP430G2xx3 RO method Most robust against interference Timer used, comparator used MSP430 devices with comparator 10uA/Button RC method Lowest power method Supports up to 16 keys GPIO plus timer used Any MSP430 device 1uA/Button Add Power Approximation / Button for Each Method (Order of Magnitude Feel) PinOsc Method (This is sub-type of RO) Easy to integrate … No external components required, Touch Sensor connected directly to MSP430 pin with CapTouch I/O Module, Works with Cap Sense Library Reduces System Cost … Enhanced GPIO module creates on-chip relaxation oscillator, System Level BOM reduced = lower cost with smaller footprint Robust : Built in hysteresis of 0.7v Liabilities: Longer Scan Times consume much more current. Power numbers based on … 500ms scan rate, VLO (~12kHz), Gate time = 5.3ms (See slaa491a for details). RO Method Great Noise Immunity … Inherently immune to low frequency noise, Hysteresis in relaxation oscillator provides high frequency noise immunity Very low power consumption 2x Timers and Relaxation Oscillator … Gate Timer, Timer for the Relaxation Oscillator, COMP_B/COMP_A Slow Scan Rates: the longer the gate time the longer it takes to scan elements Liabilities: Sensitivity is limited gate time: longer you wait the better the sensitivity RC Method Lowest power consumption of all methods Covered by Every MSP430 Device Simple interface: Two sensor can share a single R Timer and Comparator or Schmidt trigger GPIO Sensitivity is limited to clock speed: 2xx Family 16Mhz, 5xx 25MHz, Timer D 256Mhz Thick laminates require faster clock or other additional processing Fast Scan Rates Liabilities: Poor Noise Immunity and not recommended for applications that are connected to mains

Determination of threshold crossing
Library Structure Configuration APPLICATION LAYER: Schedule: Sensor Peripherals Period definition Offset Array of deltas 16bit Capacitance 0/1 Z X A SCHEDULER Sensor Delta CAP TOUCH LAYER Button Proximity Slider Wheel Capacitance Sensor Sensor: Electrodes Reference Sensor Type Measurement Method Peripherals Peripheral settings Measurement Parameters Compensation Determination of threshold crossing Filter Method Type: HAL RC RO Fast Scan RO PinOsc Element: Port I/O definitions PHYSICAL LAYER:

Capacitive Touch BoosterPack
Part Number: 430BOOST-SENSE1 Capacitive Touch plug-in for LaunchPad Touch button, scroll wheel & proximity sensor Includes MSP430G2xx2 with Cap Touch I/O module Example design for scroll wheels & Proximity sensor Full support for Capacitive Touch Library Only $10 112

Thank you!

Getting Started with the MSP430 LaunchPad

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