1. Dump Control, Delay Models
Pete Whiteis, Software Engineer
11/18/2018 Pete Whiteis
WIDAR Face to Face

2. Dumptrig, Delay Models General
Implemented as user mode processes running on station board CMIB
Real-time component implemented in the Module Access Handler
MIB
- MIB is the lowest level processing unit in the interferometer. It provides access and control over the hardware to the outside world. They are deployed across all 27 antennas (~30 per antenna) and in the control building.
- Selection of microprocessor was motivated by RFI quiet
requirement. This processor had one of the largest internal
memory regions.
- 1.5 Mbytes of memory limits software functionality down to the essentials. No Java VM, Python interpreters, etc.
11/18/2018 Pete Whiteis
WIDAR Face to Face

3. Delay model generation
Generates models for wideband and sub band delays
Inputs are start of observation (config) and periodic (delay) data
Calculates 10 seconds worth of delay/phase data
Transforms delay polynomials into raw HW units
Data time tagged for execution synchronous with 10 mS tick
MIB
- MIB is the lowest level processing unit in the interferometer. It provides access and control over the hardware to the outside world. They are deployed across all 27 antennas (~30 per antenna) and in the control building.
- Selection of microprocessor was motivated by RFI quiet
requirement. This processor had one of the largest internal
memory regions.
- 1.5 Mbytes of memory limits software functionality down to the essentials. No Java VM, Python interpreters, etc.
11/18/2018 Pete Whiteis
WIDAR Face to Face

4. Delay model generation
MIB
- MIB is the lowest level processing unit in the interferometer. It provides access and control over the hardware to the outside world. They are deployed across all 27 antennas (~30 per antenna) and in the control building.
- Selection of microprocessor was motivated by RFI quiet
requirement. This processor had one of the largest internal
memory regions.
- 1.5 Mbytes of memory limits software functionality down to the essentials. No Java VM, Python interpreters, etc.
11/18/2018 Pete Whiteis
WIDAR Face to Face

5. Dump Control
Creates Hardware Executable (HES) defining dump sequences for BB/SB pairs
Inputs are start of observation data, currently derived from text files
Generates HES for one LTA integration period (except burst mode)
Currently implemented modes are Normal, Recirculation, and Burst
Limited testing performed, verified HES executed w/o CRC errors.
MIB
- MIB is the lowest level processing unit in the interferometer. It provides access and control over the hardware to the outside world. They are deployed across all 27 antennas (~30 per antenna) and in the control building.
- Selection of microprocessor was motivated by RFI quiet
requirement. This processor had one of the largest internal
memory regions.
- 1.5 Mbytes of memory limits software functionality down to the essentials. No Java VM, Python interpreters, etc.
11/18/2018 Pete Whiteis
WIDAR Face to Face

6. Dump Control 11/18/2018 Pete Whiteis WIDAR Face to Face MIB
- MIB is the lowest level processing unit in the interferometer. It provides access and control over the hardware to the outside world. They are deployed across all 27 antennas (~30 per antenna) and in the control building.
- Selection of microprocessor was motivated by RFI quiet
requirement. This processor had one of the largest internal
memory regions.
- 1.5 Mbytes of memory limits software functionality down to the essentials. No Java VM, Python interpreters, etc.
11/18/2018 Pete Whiteis
WIDAR Face to Face

7. Dumptrig, Delay Models Future Challenges
Replace configuration text files (dumptrig) with data from Observing System
Pulsar binning, Recirculation w/ Pulsar binning
Testing through back end
Succession planning
11/18/2018 Pete Whiteis
WIDAR Face to Face

8. Questions?
11/18/2018 Pete Whiteis
WIDAR Face to Face