1. Joint Research Activity 3: Calorimetry
Felix Sefkow
DESY
HCAL meeting at DESY
January

2. Update: EUDET in a nutshell JRA3 tasks and deliverables First ideas
Slides at
Felix Sefkow January 19, 2006
EUDET JRA3

3. EUDET Not an R&D programme, but a framework for detector R&D
Originally an infrastructure initiative,
In practice more than that
But by far not all – additional resources needed to make the best out of it
Budget: 21 M€ total, 7 M€ fresh EU funds for
2M€ for calorimetry
Third ILC related EU project (within FP 6)
Demonstrates high recognition of ILC
Hopefully not the last framework programme – let us make this one a success!
Felix Sefkow January 19, 2006
EUDET JRA3

4. EUDET structure Common software Geant 4 support
Felix Sefkow January 19, 2006
EUDET JRA3

5. JRA 3: Calorimetry Activity organized in 5 tasks:
Electromagnetic calorimeter
Scalable prototype, Si sensors and electronics integration
Ecole polytechnique and Prague
Hadron calorimeter
Scalable structure, calibration system and electronics integration
DESY, Prague and Hamburg + associated Russian groups
Very forward calorimeter
Laser positioning systems, sensor characterization, electronics
DESY, Cracow, Prague and Tel Aviv + associated
Front end electronics
ASICS and integration for different calo types
LAL, Ecole polytechnique and DESY
Data acquisition
Scalable system, for prototype and as basis for common detector DAQ
University College London and associated UK groups
Felix Sefkow January 19, 2006
EUDET JRA3

6. Interconnections In 2009 it must all fit together.
We need coherence between institutes and between tasks
And between participants and associates
We propose to embed our effort into the existing collaborative structures (CALICE, FCAL)
No new series of regular meetings
Emphasize the infrastructure idea
use (prototypes of) new facilities for (intermediate) tests
Make use of existing infrastructure
E.g. adjustable stack / free alveoli, versatile FEE & DAQ
Integrate associates and newcomers
Felix Sefkow January 19, 2006
EUDET JRA3

7. Milestones and Deliverables
All milestones are deliverables
reports
Concepts,
designs –
and final
prototypes
Felix Sefkow January 19, 2006
EUDET JRA3

8. JRA3 ECAL Electromagnetic calorimeter (LLR,LAL)
Prototype of a (~ 1/6) module 0 : one line & one column
150 cm long, 12 cm wide 30 layers
channels
Test full scale mechanics + PCB
Can go in test beam
Test full integration + edge communications
Felix Sefkow January 19, 2006
EUDET JRA3

9. Presentation of EUDET Module
Concept : to be the most representative of the final detector module :
A alveolar composite/tungsten structure with :
- same W sampling
- 3 columns of cells to have representative cells in the middle of the structure (with thin composite sheets )
- Identical global dimensions (1.5m long) and shape (trapezoidal)
- fastening system ECAL/HCAL (include in the design of composite structure)
15 Detector slabs with FE chips integrated
- 1 long and complete slab (L=1.5m)
- 14 short slabs to obtain a complete tower of detection (typ. L=30 cm?) and
design of compact outlet.

10. JRA3 FEE & DAQ Front-End electronics (DESY, LAL, LPC)
Complete readout ASIC with power cycling and integrated ADC
ASIC for SiPMs and digital HAdronic calorimeter
Elementay stitchable motherboards
New : data concentrator at module end
Data acquisition (UCL, LLR)
Complete DAQ for all calo prototypes
Felix Sefkow January 19, 2006
EUDET JRA3

11. Milestones and Deliverables
test
facilities
DAQ
systems
ASICS
Not very detailed – but somewhat more rigid than we are used to
Felix Sefkow January 19, 2006
EUDET JRA3

12. Workplan for 2006 Physics prototype Technological prototype
Analysis of TB at DESY : electronics performance : physicist inputs needed
Test new thin PCB with FLCPHY3 ASIC inside detector & inside shower
Test power pulsing with new FLCPHY4 on testbeam data
Technological prototype
Optimize detector geometry (cell size, #layers…) : physicist inputs needed NB : directly impacts front-End ASIC design
Finalize ILC_TECH2-3 front-end ASIC, including digital part and readout scheme
Advance in parallel R&D on ADCs
Design “stitchable” motherboards
Prototype front end ASICs for AHCAL and/or DHCAL
Participate to construction of technological prototype within EUDET
Felix Sefkow January 19, 2006
EUDET JRA3

13. AHCAL FEE The final ASIC : # channel/ASIC ? data rate ?
Consumption µW/Ch ?
Felix Sefkow January 19, 2006
EUDET JRA3

14. Chip complexity ? INTEL® PENTIUM ™ IV ILC_FINAL ? FLC_PHY3
Felix Sefkow January 19, 2006
EUDET JRA3

15. Prospective for A-HCAL SiPM Chip
Future Developments for SiPM Chip from 2006 :
More recent technology : BiCMOS SiGe 0.35um
Chip fully dedicated for SiPM
Development in parallel of ECAL Chip
Power Idling
8-bit DAC (0-5V) to correct the SiPM gain variation
Same Mode for Calibration and Physics acquisition (tp ~ 30-40ns)
Implementation of new elements:
Auto-trigger (fast shaper + Discriminator)
Internal TDC
Internal 12-bit ADC
T&H x1
Variable gain Preamplifier
Discri
TDC
12-bit ADC
8 bit DAC (0-5V) in
Fast Shaper
Shaper tp~30-40ns
Auto-trigger
12-bit DAC
Threshold
Capacitance for AC coupling …
Analogue Memory
Charge Ouput
Time Ouput
Felix Sefkow January 19, 2006
EUDET JRA3Working document – L.Raux

16. EUDET JRA3Working document – L.Raux
TDC Principle
12 bit ADC
DAC
I constant
Vcapa t T C
Discri
Threshold
Fast Shaper Output 12
TDC Control T0
Trigger
RST
Felix Sefkow January 19, 2006
EUDET JRA3Working document – L.Raux

17. Mechanical structure The TESAL TDR had long barrel modules
Discussed and confirmed at December meeting
Implictions f
or ECAL support
Felix Sefkow January 19, 2006
EUDET JRA3

18. Dimensions New LDC baseline: Barrel Endcap Mass 500t + 2 * 200t
180 < R < 280 cm
-220 < z < 220 cm
Endcap
30 < R < 270 cm
250 < |z| < 380 cm
Mass 500t + 2 * 200t
Depth 4.4 (5.3) 
Active area ~ 5000 m2
(for 38 (50) layers)
Felix Sefkow January 19, 2006
EUDET JRA3

19. Readout architecture Module is about 2m x 2m * 40 layers
1000 channeles / m2 – or 16 ASICs with 64 channels
Daisy-chain chips: O(10) readout lines per layer at barrel end
Data concentration (2 stages: per layer, per module); 1 DAQ link
Active layer thickness: can be 3mm scintillator + 2mm for PCB with embedded ASIC
Issues to address soon:
Power dissipation in steel module
Scintillator SiPM FEE coupling
Where to put the SiPM?
Felix Sefkow January 19, 2006
EUDET JRA3

20. R&D New Photodetectors for ILC Hadron Calorimeter
New Concept of Hadron Sc Tile Calorimeter –
direct light readout from Scintillator Tile by Advance Silicon Photomultiplier
Sc. Cell
Sc. Cell
SiPM
Felix Sefkow January 19, 2006
EUDET JRA3

21. SiPM’s future development
-source
Efficiency of light registration %
Geometrical efficiency 25%
Dark rate MHz
Period x30 m
Total number of pixels 27800
MIP signal pixels
Noise signal (100 ns) 4 pixel
Crosstalk suppression
Dynamic range 27800/50550
Fast signal  5 ns
Response functions for the SiPMs with different total pixel numbers measured for 40 ps laser pulses
Tile 3x3 cm2
Without WLS
Without precision requirements to support plate
Without precision milling and assembling
Monitoring and calibration with SiPM:
- Monitoring by measurement of MIP or alpha signals
No need single pixel spectra
Electronics
Without single pixel resolution
Self triggering
With internal delay
Felix Sefkow January 19, 2006
EUDET JRA3

22. SiPMs
Need to formulate our goals, give SiPM developers freedom to optimize:
How many photons per mm2 ?
On face, edge, corner, fibre, green/blue
Can then work on spectral sensitivity, packing factor or total area
Max noise rate
Rise time
Auto-calibration
Single pe. peaks
Felix Sefkow January 19, 2006
EUDET JRA3

23. What we intend to do in EUDET (2)
ECAL – to solve technical problems with assembly and deliver sensors for prototypes
VFCAL – using the solutions with sensors for ECAL deliver Si sensors for prototype:
1 tower = 20 wafers
HCAL – calibration electronics
2006: 40 (double)boards
Later: new prototype version for simplified light distribution over the plane
We expect new prototypes being developed every 2nd year and produced the following year
Participation in tests and data analysis
Detector simulation
Felix Sefkow January 19, 2006
EUDET JRA3

24. HCAL Milestones and Deliverables
reports
Concepts,
designs –
and final
prototypes
concepts
feedback
PPT construction
Testbeam data taking
Felix Sefkow January 19, 2006
EUDET JRA3

25. Conclusion As realistic as possible – but on schedule
R&D phase till mid 2007
A lot to learn in the next months
Felix Sefkow January 19, 2006
EUDET JRA3