1. Digital Processing Platform
Low power micro-controller
Small size for compact integration
Enables adaptation of node behavior with changing requirements, environmental characteristics, and network state
Enables experimentation with different algorithms and protocols
Enables use of energy saving processor modes and associated operating system functionality
Development of streamlined software implementations
Highly memory-constrained software implementations are required due to size and energy constraints
Leverage our previous work in synthesis of memory-efficient embedded software implementations
Employ formal programming models, and apply graph-theoretic analysis and optimization of program structure
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2. Example of Software Structure
No new data
Check for new data
Low power sleep mode
Periodic wake-up No
Broadcast new data
Extract data
Fuse with prior data
Yes
Need to update neighbors?
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3. Task Assignment Algorithms
Need to balance communication and computation throughout the network
Develop models of power consumption in network nodes and communication links
Develop task graph models of overall network functionality
Develop algorithms to embed task graph algorithm specifications into the network
Assign processing tasks to network nodes
Turn off idle nodes
Large design space
Explore evolutionary algorithms to optimize task graph embeddings
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4. Evolutionary Algorithms
Phenotype space (Original search space)
P(t+1)
P(t)
Selection
Decoding function
Genetic operators
G(t+1)
Genotype space (Genetic representation)
G(t)
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5. References: selected prior work related to embedded software optimization
N. K. Bambha, S. S. Bhattacharyya, J. Teich, and E. Zitzler. Systematic integration of parameterized local search in evolutionary algorithms. IEEE Transactions on Evolutionary Computation. To appear.
S. S. Bhattacharyya. Hardware/software co-synthesis of DSP systems. In Y. H. Hu, editor, Programmable Digital Signal Processors: Architecture, Programming, and Applications, pages Marcel Dekker, Inc., 2002.
P. K. Murthy and S. S. Bhattacharyya. Shared buffer implementations of signal processing systems using lifetime analysis techniques. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 20(2): , February 2001
S. S. Bhattacharyya, R. Leupers, and P. Marwedel. Software synthesis and code generation for DSP. IEEE Transactions on Circuits and Systems --- II: Analog and Digital Signal Processing, 47(9): , September 2000.
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