1. Chapter 12 : Field – Effect Transistors
12-1 NMOS and PMOS transistors
12-2 Load-line analysis of a simple NMOS amplifier
12-3 Small –signal equivalent circuits
12-4 Common source amplifiers
12-5 Source followers
12-6 CMOS logic gates

11. Chapter 12 : Field – Effect Transistors
12-1 NMOS and PMOS transistors
12-2 Load-line analysis of a simple NMOS amplifier
12-3 Small –signal equivalent circuits
12-4 Common source amplifiers
12-5 Source followers
12-6 CMOS logic gates

12. CMOS Logic –gate Circuits Combinatorial logic circuits

35. 10. 3 CMOS Logic Gate Circuits 10. 3. 1 Basic structure Fig. 10
10.3 CMOS Logic Gate Circuits Basic structure Fig Representation of a three- input CMOS logic gate

36. Fig. 10.10 Examples of pull –down networks (PDN)

39. Fig. 10.10 Examples of pull- up networks (PUN)

40. Fig. 10.11 Usual and alternative symbols for MOSFETs

41. 10.3.2 The Two – Input NOR Gate Fig. 10.12 A two – input CMOS NOR gate

42. 10.3.3 The Two- Input NAND Gate Fig. 10.13 A two-input CMOS NAND gate

43. A Complex Gate

44. 10. 3. 5 Obtaining the PUN and the PDN and Vice Versa Fig. 10
Obtaining the PUN and the PDN and Vice Versa Fig CMOS realization of a complex gate

45. 10. 3. 6 The Exclusive- OR Function Fig. 10
The Exclusive- OR Function Fig Realization of the exclusive –OR (XOR) function .

47. 10.3.8 Transistor Sizing Fig. 10.16 Proper transistor sizing for a four- input NOR gate

51. Fig. 10. 17 Proper transistor sizing for a four- input NAND gate

52. Fig. 10.18 Circuit for Example 10.2