1. EMT 245: lecture 4: assembly language
Razaidi Hussin
**Notes taken from WAN MOKHDZANI BIN WAN NOR HAIMI and Mr. Ahmad Husni

2. Hierarchy High Level Language Compiler Assembly Language Assembler
Machine Code
Microprocessor Hardware

3. 8085A Instruction Set
Can be classified into the following five functional categories:
Data transfer (copy) Instruction,
Arithmetic Instruction (add, subtract),
Logical Instruction (and, or),
Branching Instruction (jump, delay), and
Machine-control Instruction (input, output port).

4. 8085A Instruction Set Data Transfer Instruction
Move data between registers or between memory locations and registers. Includes moves, loads, stores and exchanges.
Copies data from a location called a source to another location, called a destination, without modifying the contents of the source.
In technical manuals, the term data transfer is used for this copying function.
The term transfer is misleading; it creates the impression that the contents of a source are destroyed when, in fact, the contents are retained without any modification.

5. 8085A Instruction Set Arithmetic Instruction
Adds, Subtracts, Increments, Decrements data in registers or memory.
Logic Instruction
ANDs, ORs, XORs, compares, rotates or complements data in registers or between memory and registers.
These instructions perform various logical operations with the contents of the accumulator.

6. 8085A Instruction Set Branch/Jump Instruction
Initiates conditional or unconditional jumps, calls, returns and restart.
This group of instructions alters the sequence of program execution either conditionally or unconditionally:
Jump - Conditional jumps are an important aspect of the decision-making process in programming. These instructions test for a certain condition (e.g., Zero or Carry flag) and alter the program sequence when the condition is met.
This set includes an instruction called unconditional jump.
Call, Return, and Restart -These instructions change the sequence of a program either by calling a subroutine or returning from a subroutine.
The conditional Call and Return instructions also can test condition flags.

7. 8085A Instruction Set Stack, I/O and Machine Control Instruction
Includes instructions for maintaining stack, reading from input port, writing to output port, setting and reading interrupt mask and clearing flags.
These instructions control machine functions such as Halt, Interrupt, or do nothing.

8. Programming Model 8 bit A FLAG B C D E H L SP PC CPU 8 bit I/O 8 bit
FDH
06H
FFH
FEH
0001H A
FLAG
0002H B C
0003H D E
0004H H L
0005H
0006H SP PC
FFFDH
CPU
FFFEH
FFFFH
MEMORY
I/O

9. Data Transfer IMMEDIATE DATA TRANSFER MVI reg , data8 ;data8  (reg)
LXI rp ,data16 ;data16  (rp)
REGISTER DATA TRANSFER
MOV reg1 , reg2 ;(reg2)  (reg1)
Reg (Register) : A,B,C,D,E,H,L
Rp (Register Pair) : BC,DE,HL & SP

10. Example 1 2 MVI A ,10 ;A=0AH MVI B ,10010001B ;B=91H MVI D ,7FH ;D=7FH
LXI B , ;B=00H , C=03H
LXI H ,2345H ;H=23H , L=45H
LXI D , ;D=00H , E=64H
LXI SP,3FF0H ;SPH=3FH,SPL=F0H
MVI B, 55H
MOV A , B
MOV C , A
MOV H , C
MOV L , A
MOV E , L
HLT 1 2

11. Direct data transfer LDA address16 STA address16 LHLD address16
SHLD address16

12. Example LDA 3000H (3000H)  (A) STA 2100H (A)  (2100H) 0000H 0001H ..
STORE
2100H x1 A
2101H x1
2102H .. ..
LOAD
3000H y1 A .. y1
3509H

13. Example 0000H LHLD 8000H (8000H)  (L) (8000H + 1)  (H) SHLD 3500H
STORE ..
3500H x1 L x1
3501H x2 H x2
3502H ..
LOAD ..
8000H y1 L y1
8001H y2 H y2
3509H

14. Indirect data transfer
LDAX B ;pointer is BC register
LDAX D ;pointer is DE register
STAX B ;pointer is BC register
STAX D ;pointer is DE register
MOV reg , M ;pointer is HL register
MOV M , reg ;pointer is HL register
MVI M data8 ;pointer is HL register

15. Example LXI B , 2020H 0000H 0001H 0002H 0003H 0004H 0005H 0006H B C
MVI A , 88H
STAX B
INX B
LDAX B
LXI H , 3000H
MOV D , M
MOV M , A
0000H
0001H
0002H
0003H
0004H
0005H
0006H B C
2020H
88H A
88H
20H
20H
2021H
AAH D H L
30H
00H
3000H
FFH

16. Example 0000H Instruction INX – increment Register pair BC = 2021H
AAH
20H
21H
2021H
AAH D
FFH H L
30H
00H
3000H
FFH

17. Example 0000H Transfer 10 byte data from memory location 3000h
To memory location 3500h using
LDA & STA
LDA 3000H
STA 3500H .
LDA 3009H
STA 3509H
0001H ..
3000H x1
3001H x2 .. ..
3009H
x10 ..
3500H x1 .. ..
3509H
x10

18. Example Transfer 10 byte data from memory location 3000h
To memory location 3500h
MVI H,10
LXI B , 3000H
LXI D , 3500H
LOOP: LDAX B
STAX D
INX B
INX D
DCR H
JNZ LOOP
HLT
0000H
0001H ..
3000H x1
3001H x2 .. ..
3009H
x10 ..
3500H x1 .. ..
3509H
x10

19. DATA TRANSFER INSTRUCTIONS
MOV
MVI
LDA
LDAX
LXI
LHLD
STA
STAX
SHLD
XCHG
SPHL
XTHL
Copy from source to destination
Move immediate 8-bit
Load accumulator
Load accumulator indirect
Load register pair immediate
Load H and L registers direct
Store accumulator direct
Store accumulator indirect
Store H and L registers direct
Exchange H and L with D and E
Copy H and L registers to the stack pointer
Exchange H and L with top of stack

20. Arithmetic Operation
ALU
FLAG
CPU REGISTER

21. Arithmetic Instruction
ADDITION
Any 8-bit number, or the contents of a register, or the contents of a memory location can be added to the contents of the accumulator and the sum is stored in the accumulator.
No two other 8-bit registers can be added directly (e.g., the contents of register B cannot be added directly to the contents of register C). The instruction DAD is an exception; it adds 16-bit data directly in register pairs.
ADI data8 (A) + data8  (A)
ADD reg (A) + (reg)  (A)
ACI data8 (A) + data8 + CY  (A)
ADC reg (A) + (reg) + CY  (A)
DAD rp (HL) + (rp)  (HL)

22. Example ADI 99H ; A contains 88 (H)
register A decimal constant decimal _____________ _____ register A decimal
S = 0 Bit D7 = 0 after addition
Z = 0 The accumulator contains other than zero after addition
AC = 1 There is a carry out of bit D3 to bit D4 during addition
P = 1 The accumulator contains an even number of ‘1’s after addition
CY = 1 There is an overflow as a result of the addition

23. Example ADC B ; A contains 88 (H) B contains 99 (H) ; CY =1 CY 1
register A register B _____________
register A
Flag : S = 0, Z = 0, AC = 1, P = 1,CY = 1

24. Arithmetic Instruction
SUBTRACTION
Any 8-bit number, or the contents of a register, or the contents of a memory location can be subtracted from the contents of the accumulator and the results stored in the accumulator.
The subtraction is performed in 2’s complement, and the results, if negative, are expressed in 2’s complement. No two other registers can be subtracted directly.
SUI data8 (A) - data8  (A)
SUB reg (A) - (reg)  (A)
SBI data8 (A) - data8 - CY  (A)
SBB reg (A) - (reg) - CY  (A)

25. Arithmetic Instruction
INCREMENT/DECREMENT
The 8-bit contents of a register or a memory location can be incremented or decremented by 1.
Similarly, the 16-bit contents of a register pair (such as BC) can be incremented or decremented by I. These increment and decrement operations differ from addition and subtraction in an important way; i.e., they can be performed in any one of the registers or in a memory location.
INR reg (reg)  (reg)
DCR reg (reg)  (reg)
INX rp (rp)  (rp)
DCX rp (rp)  (rp)
Note : No Flag Effected for INX & DCX

26. ARITHMETIC INSTRUCTIONS
ADD
ADC
ADI
ACI
DAD
SUB
SBB
SUI
SBI
INR
INX
DCR
DCX
DAA
Add register or memory to accumulator
Add register to accumulator with carry
Add immediate to accumulator
Add immediate to accumulator with carry
Add register pair to H and L registers
Subtract register or memory from A
Subtract source and borrow from A
Subtract immediate from A
Subtract immediate from A with borrow
Increment register or memory by 1
Increment register pair by 1
Decrement register or memory by 1
Decrement register pair by 1
Decimal adjust accumulator

27. Logic Instruction
AND, OR, Exclusive-OR - Any 8-bit number, or the contents of a register, or of a memory location can be logically ANDed, ORed, or EXORed with the contents of the accumulator.
The results are stored in the accumulator.
AND
AND Immediate With Accumulator
ANI data8 (A) Λ Data8  (A)
AND Register/Memory With Accumulator
ANA reg (A) Λ (Reg)  (A)

28. Logic Instruction OR OR Immediate With Accumulator
ORI data8 (A) V Data8  (A)
OR Register/Memory With Accumulator
ORA reg (A) V (Reg)  (A)

29. Logic Instruction EXCLUSIVE-OR EX-OR Immediate With Accumulator
XRI data8 (A) ⊕ Data8  (A)
EX-OR Register/Memory With Accumulator
XRA reg (A) ⊕ (Reg)  (A)

30. Logic Instruction
Complement - The contents of the accumulator can be complemented; all 0s are replaced by 1s and all 1s are replaced by 0s.
COMPLEMENT THE ACCUMULATOR
CMA ( )  (A)
COMPLEMENT THE CARRY STATUS
CMC ( )  (CY) A CY

31. Logic Instruction
Compare - Any 8-bit number, or the contents of a register, or a memory location can be compared for equality, greater than, or less than, with the contents of the accumulator.
Compare Accumulator With Immediate Data
CPI data8 (A) – data8
Compare Accumulator With Register/Memory
CMP reg (A) – (reg)
Note: Only flag affected

32. Logic Instruction
Rotate - Each bit in the accumulator can be shifted either left or right to the next position.
Rotate Accumulator Right Through Carry
RAR (A0)  (CY)
(An+1)  (An)
(CY)  (A7) A0 A1 A2 A3 A4 A5 A6 A7 CY

33. Logic Instruction Rotate Accumulator Left Through Carry
RAL (A7)  (CY)
(An)  (An+1)
(CY)  (A0) A0 A1 A2 A3 A4 A5 A6 A7 CY

34. Logic Instruction Rotate Accumulator Right RRC (A0)  (A7)
(An+1)  (An)
(A0)  (CY) A0 A1 A2 A3 A4 A5 A6 A7 CY

35. Logic Instruction Rotate Accumulator Left RLC (A7)  (A0)
(An)  (An+1)
(A7)  (CY) A0 A1 A2 A3 A4 A5 A6 A7 CY

36. LOGIC INSTRUCTIONS CMP Compare register or memory with A CPI
ANA
ANI
XRA
XRI
ORA
ORI
RLC
RRC
RAL
RAR
CMA
CMC
STC
Compare register or memory with A
Compare immediate with accumulator
Logical AND register or memory with A
Logical AND immediate with accumulator
Exclusive OR register or memory with A
Exclusive OR immediate with accumulator
Logical OR register or memory with A
Logical OR immediate with accumulator
Rotate accumulator left
Rotate accumulator right
Rotate accumulator left through carry
Rotate accumulator right through carry
Complement accumulator
Complement carry
Set carry

37. Branch Instruction Unconditional Jump JMP address16
(Byte 3) (Byte 2)  (PC)
Conditional Jump
J Condition address16
If (Condition= true)

38. Conditional Jump Condition JZ Z=1 Jump if Zero flag SET
JNZ Z=0 Jump if Zero flag NOT SET
JC CY=1 Jump if Carry flag SET
JNC CY=0 Jump if Carry flag NOT SET
JM S=1 Jump if Sign flag SET
JP S=0 Jump if Sign flag NOT SET
JPE P=1 Jump if Parity flag SET
JPO P=0 Jump if Parity flag NOT SET

39. Conditional Jump Example 1 - Check Zero Flag MVI B, 255 LOOP: DCR B
JNZ LOOP ;if Z == 0 then goto
;LOOP

40. Conditional Jump Example 2 – Find the smallest value between
two number
= x1 ; (B) = x2
LOOP: CMP B ;(A) – (B)
JNC EXIT ;if CY == 0 then EXIT
JMP STORE
EXIT: MOV A, B
STORE: STA 2050H

41. Branch Instruction Unconditional Call Subroutine CALL address16
(PCH)  ((SP) –1)
(PCL)  ((SP) –2)
(SP) – 2  (SP)
(Byte 3)(Byte 2)  (PC)

42. Branch Instruction Conditional Call Subroutine C Condition address16
If (Condition = True)
(PCH)  ((SP) –1)
(PCL)  ((SP) –2)
(SP) – 2  (SP)
(Byte 3)(Byte 2)  (PC)

43. Conditional Call Subroutine
CZ Z=1 Call if Zero flag SET
CNZ Z=0 Call if Zero flag NOT SET
CC CY=1 Call if Carry flag SET
CNC CY=0 Call if Carry flag NOT SET
CM S=1 Call if Sign flag SET
CP S=0 Call if Sign flag NOT SET
CPE P=1 Call if Parity flag SET
CPO P=0 Call if Parity flag NOT SET

44. Branch Instruction Return From Subroutine RET ((SP))  (PCL)
((SP) + 1)  (PCH)
(SP) + 2  (SP)
Return From Subroutine (Conditional)
R Condition
If (Condition = True)

45. Return From Subroutine (Conditional)
RZ Z=1 Return if Zero flag SET
RNZ Z=0 Return if Zero flag NOT SET
RC CY=1 Return if Carry flag SET
RNC CY=0 Return if Carry flag NOT SET
RM S=1 Return if Sign flag SET
RP S=0 Return if Sign flag NOT SET
RPE P=1 Return if Parity flag SET
RPO P=0 Return if Parity flag NOT SET

46. Return From Subroutine
Example
LXI SP, 3FF0H ;init Stack Pointer
MVI A, 80H
OUT 83H ;Init 8255, all port as output
REPEAT: MVI A,0
OUT 80H
CALL DELAY ;Call subroutine
MVI A,1
JMP REPEAT
DELAY: MVI B, 0 ;Subroutine
LOOP: DCR B
JNZ LOOP
RET
END

47. BRANCHING INSTRUCTIONS
JMP JC
JNC JP JM JZ
JNZ
JPE
JPO
Jump unconditionally
Jump on carry
Jump on no carry
Jump on positive
Jump on minus
Jump on zero
Jump on no zero
Jump on parity even
Jump on parity odd

48. BRANCHING INSTRUCTIONS
CALL CC
CNC CP CM CZ
CNZ
CPE
CPO
Call unconditionally
Call on carry
Call on no carry
Call on positive
Call on minus
Call on zero
Call on no zero
Call on parity even
Call on parity odd

49. BRANCHING INSTRUCTIONS
RET RC
RNC RP RM RZ
RNZ
RPE
RPO
PCHL
RST
Return unconditionally
Return on carry
Return on no carry
Return on positive
Return on minus
Return on zero
Return on no zero
Return on parity even
Return on parity odd
Load program counter with HL contents
Restart

50. I/O,Stack, Machine Control Instruction
Stack Operation
Write The Content of Register Pair onto the Stack
PUSH rp
(reg high)  ((SP) –1)
(reg low)  ((SP) –2)
(SP) – 2  (SP)

51. Stack Operation Write The Content of Accumulator &
Flag Status onto the Stack
PUSH PSW
(A)  ((SP) –1)
(Flag)  ((SP) –2)
(SP) – 2  (SP)

52. Stack Operation Retrieve The Content of Register Pair From The Stack
POP rp
((SP)) (reg low)
((SP) + 1) (reg high)
(SP) + 2 (SP)

53. Stack Operation Retrieve The Content of Accumulator &
Flag Status From The Stack
POP PSW
((SP)) (Flag)
((SP) + 1) (A)
(SP) + 2 (SP)

54. Working with the Stack
Example - Write a program to exchange the contents
of BC register with DE register
Program 1 Program 2
MOV H,B PUSH B
MOV L,C PUSH D
MOV B,D POP B
MOV C,E POP D
MOV D,H
MOV E,L

55. I/O,Stack, Machine Control Instruction
Input/Output Operation
Input From The Port
IN Port_Address
(port)  (A)
Output To Port
OUT Port_Address
(A)  (Port)

56. Example Input From The Port IN 80H ;Read from Port 80H
STA 2100H ;Store to Memory
Output To Port
MVI A, 01H
OUT 81H ;Write 01H to Port 81H

57. I/O,Stack, Machine Control Instruction
Interrupt
RIM Read interrupt mask
SIM Set Interrupt mask
DI Disable Interrupt
EI Enable Interrupt
(Detail discussion in interrupt topic)

58. I/O,STACK, MACHINE CONTROL INSTRUCTION
PUSH
POP
OUT IN
NOP
HLT DI EI
RIM
SIM
Push register pair onto stack
Pop of stack to register pair
Output data from A to a port with 8-bit address
Input data to A from a port with 8-bit address
No operation
Halt
Disable interrupts
Enable interrupts
Read interrupt mask
Set interrupt mask

59. Common Errors MOV B, A: Assuming that this copies from B to A.
Incrementing the address in decimal, from 2039H to 2040H.
HLT: Not terminating a program.

60. ASSEMBLY LANGUAGE PROGRAMMING
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ASSEMBLY LANGUAGE PROGRAMMING