1. Solving the SoC Design Dilemma for IoT Applications with Embedded FPGA
Tim Saxe, CTO QuickLogic
Copyright © 2017 QuickLogic, Inc. All rights reserved.

2. QuickLogic Maximizing Battery Life for Immersive User Experiences in Smartphone, Wearable and IoT devices. 
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9/21/2018

3. After 40 years of Higher performance More integration More software
Smaller geometries
Higher performance
More integration
More software
A new path emerges…
Copyright © 2017 QuickLogic, Inc. All rights reserved.
9/21/2018

4. What Drove the Last 40 Years?
Integrated circuits challenged the assumption that a computer was a room sized piece of equipment,
And Moore’s Law challenged the assumption that computers were expensive

5. Old way: Up and to the Right
FPGA
Software Perspective
A CPU for every need
Need more performance?
Bigger CPU, faster clock and more memory
Need even more performance?
Multiple CPUs
Still not enough performance?
Add a hardware accelerator
A15 A8 A5 R7
Performance R4 M4 M3 M0
Capability

6. What is Changing Now? Mask costs Fragmented markets
The role of software
Owning the BOM

7. Mask Costs
In the 80’s, masks were cheap and transistors were expensive
Adding enough eFPGA to be useful was prohibitively costly
At smaller geometries the cost of adding a useful amount of eFPGA gates becomes reasonable and the cost of a spin becomes really painful

8. Fragmented, Changing Markets
Most IoT markets are very new:
The good news is that means opportunity
The bad news is that makes it very difficult to tell what they need
Need multiple SKUs
“Follow a build-test-learn process.” HBR
“Components must be … amenable to … still-unidentified future products.”, McKinsey

9. Build-Test-Learn We’ve been helping people do this for nearly 30 years
(used to be called burn and learn)
Easy to do with eFPGA, really hard and expensive with silicon
Goes against the “Do It Right The First Time” semiconductor culture

10. What about ‘still-unidentified future products’?
“How do I design for something that I don’t know?”
‘Want Some Creativity? Crank-up the Constraints’ Bob Sutton d.school
Be amazed what can be done with a small amount of programmable logic

11. When Software is not the answer
CPU too slow?
Use an FPGA
Dedicated hardware can easily give a 5x to 10x performance advantage
CPU too power hungry?
Use an FPGA
Dedicated hardware can easily give a 5x to 10x power advantage
Battery Life M0 M3 M4 R4 R7 A5 A8
A15
Capability
FPGA
Performance M0 M3 M4 R4 R7 A5 A8
Capability
FPGA

12. ‘Components must be small enough to be embedded in today’s smart watches and smart glasses but also amenable to further shrinking’ -- McKinsey
Every extra component takes up volume that could be used to add battery capacity, or make the product smaller – eFPGA eliminates a component

13. Every extra component brings another vendor into the equation
The more complete the solution, the fewer potential competitors and a larger percentage of the available BOM

14. eFPGA Summary
Transistor costs now low enough that a useful amount of eFPGA costs a few cents
Mask costs now high enough that adding a few cents to die cost to save a design spin has a good ROI
Rapidly evolving market favors fast TTM eFPGA solutions
Fragmented market combined with high mask costs favor flexible solutions
When performance is critical, hardware beats software
When power is critical, hardware beats software
Tools, not silicon, are the key to FPGA success

15. Un-named, 2nd Top-Tier Foundry
Secured Two Top-tier eFPGA Foundries 1st Embedded FPGA IP for GLOBALFOUNDRIES’ 22FDX®
ArcticPro™, first eFPGA announced for new GLOBALFOUNDRIES’ 22FDX® (FD-SOI) process
Second top-tier foundry to port, and market for licensing, that expands the availability to semiconductor companies and OEMs developing new designs targeting this foundry's high volume 40nm fabrication process
Design proven in 65nm and 40nm ArcticLink and EOS products that are used in a variety of commercial products
Un-named, 2nd Top-Tier Foundry
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