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Morgan Kaufmann Publishers Computer Organization and Assembly Language

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1 Morgan Kaufmann Publishers Computer Organization and Assembly Language
September 17, 2018 CS 206 D Computer Organization and Assembly Language Chapter 1 — Computer Abstractions and Technology

2 Array and Addressing Modes

3 Lecture Outline Introduction Addressing Modes Register Indirect Mode Based and Indexed Addressing Modes

4 Introduction Introduction
The way an operand is specified is known as its addressing mode. Addressing modes: Register mode Immediate mode Direct mode Register Indirect Based Indexed Based Indexed An operand is a register (ex. INC AX) An operand is a constant (ex. ADD A, 5) An operand is a variable(ex. ADD A, 5) Used with one dimensional arrays Address memory operands indirectly Used with two dimensional arrays Addressing Modes

5 Register Indirect Mode
The offset address of the operand is contained in a register. I.e. The register acts as a pointer to the memory location. Format: [register] The register must be one of the following: BX SI DI BP The operand’s segment number is contained in DS The operand’s segment number is contained in SS

6 Memory Address Generation
Physical Address (20 Bits) Adder Segment Register (16 bits) Offset Value (16 bits) The physical memory addresses The Data Segment Memory Segment Register Offset Physical Address + DS: SI 05C0 0050 05C00H 05C50H DS:SI 00000H 0FFFFFH Data is usually fetched with respect to the DS register. The effective address (EA) is the offset. The EA depends on the addressing mode.

7 Register Indirect Mode
Example 1: suppose that SI contains 0100h, and the word at 0100h contains 1234h. MOV AX, [SI] The CPU: 1. Examines SI and obtains the offset address 100h. 2. Uses the address DS:0100h to obtain the value 1234h. 3. Moves 1234h to AX. MOV AX, SI The CPU will move the value of SI, namely 100h, into AX. Addressing Modes

8 Register Indirect Mode
Example 2: Write some code to sum in AX the elements of the 10-element array W defined by W DW 10,20,30,40,50,60,70,80,90,100 MOV AX, 0 ; AX holds sum LEA SI, W ; SI points to array W MOV CX, 10 ; CX has number of elements ADDNOS: ADD AX, [SI] ; sum = sum + element ADD SI, 2 ; move pointer to the next element LOOP ADDNOS ; loop until done

9 Based and Indexed Addressing Modes
The operand’s offset address is obtained by adding a number called a displacement to the contents of a register. Displacement may be: The offset address of a variable. (ex. A) A constant (positive or negative). (ex. -2) The offset address of a variable + or - a constant. (ex. A + 4) Syntax: [register + displacement] [displacement + register] [register] + displacement displacement + [register] displacement [register] R opcode instruction Registers operand Memory A + Addressing Modes

10 Based and Indexed Addressing Modes
The register must be one of the following: BX SI DI BP The addressing mode is called based if BX (base register) or BP (base pointer) is used. The addressing mode is called indexed if SI (source index) or DI (destination index) is used. The operand’s segment number is contained in DS The operand’s segment number is contained in SS Addressing Modes

11 Based and Indexed Addressing Modes
Example 3: Suppose W is a word array, and BX contains 4 MOV AX, W[BX] The displacement is the offset address of variable W. The instruction moves the element at address W + 4 to AX. (this is the third element in the array) The instuction could also have been written in any of these forms: MOV AX, [W+BX] MOV AX, [BX+W] MOV AX, W+[BX] MOV AX, [BX]+W Addressing Modes

12 Based and Indexed Addressing Modes
Example 4: . suppose SI contains the address of a word array W MOV AX, [SI+2] • The displacement is 2. • The instruction moves the contents of W + 2 to AX. (this is the second element in the array) • The instruction could also have been written in any of these forms: MOV AX, [2+SI] MOV AX, 2+[SI] MOV AX, [SI]+2 MOV AX, 2[SI] Addressing Modes

13 Based and Indexed Addressing Modes
Example 5: Write some code to sum in AX the elements of the 10-element array W defined by W DW 10,20,30,40,50,60,70,80,90,100 XOR AX, AX ; AX holds sum. Can also use MOV AX,0 XOR BX, BX ; clear base register MOV CX, 10 ; CX has number of elements ADDNOS: ADD AX, W[BX] ; sum = sum + element ADD BX, 2 ; index next element LOOP ADDNOS ; loop until done Addressing Modes

14 Based and Indexed Addressing Modes
Example6 Suppose that ALPHA is declared as ALPHA DW H,0456H,0789H,0ABCDH In segment address by DS. Suppose also that BX contains 2 offset 0002 contains 1084 h SI contains 4 offset 0004contains 2BACh DI contains 1 What will be the result of following instructions: instruction NUMBER MOVED MOV AX,[ALPHA+BX] 0456H MOV BX,[BX+2] 2BACH MOV CX,ALPHA[SI] 0789H MOV AX,-2[SI] 1084H MOV BX,[ALPHA+3+DI] MOV AX,[BX]2 illegal Addressing Modes

15 Based and Indexed Addressing Modes
Example7. Replace each lower case letter in the following string by it’s upper case equivalence. Use index addressing mode MSG DB ‘this is a message’ Solution: MOV CX, ; NO of chars in string XOR SI, SI ; clear SI indexes a char TOP: CMP MSG[SI],’ ‘ ;BLANK ? JE NEXT ; yes skip over AND MSG[SI],0DFH ; convert to upper case NEXT: INC SI ;Index next byte LOOP TOP ; loop until done Addressing Modes

16 Addressing modes Mode Meaning Pros Cons Implied Fast fetch
Limited instructions Immediate Operand=A No memory ref Limited operand Direct EA=A Simple Limited address space Indirect EA=[A] Large address space Multiple memory ref Register EA=R Register indirect EA=[R] Extra memory ref Displacement EA=A+[R] Flexibility Complexity stack EA=stack top Limited applicability


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