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Test 2 review Lectures 5-10.

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1 Test 2 review Lectures 5-10

2 Review Test 2 will cover lectures 5-10.
There are approx questions in total with the last being a bonus question. The questions take the form of short answers (where you are expected to write briefly on a topic), homework-like problems, and exercises similar to those done in lectures.

3 Pipeline Exercise Perhaps the most important skill for you to have developed in this unit is the ability to understand and specify the state of a pipeline executing a given set of instructions. This skill indicates that you understand not only how basic pipelining works, but also how hazards are handled in a processor. We will do one of these exercises together.

4 Pipeline exercise Imagine we have the following instructions being executed lw $10, 20($1) 28 sub $11, $2, $3 32 and $12, $4, $5 36 or $13, $6, $7 40 add $14, $8, $9 What are the contents of IF/ID, ID/EX, EX/MEM, and MEM/WB at the end of cycle 5?

5 Pipeline exercise What are the contents of IF/ID, ID/EX, EX/MEM, and MEM/WB at the end of cycle 5? 24 lw $10, 20($1) 28 sub $11, $2, $3 32 and $12, $4, $5 36 or $13, $6, $7 40 add $14, $8, $9 IF/ID Field Value PC+4 Instruction

6 Pipeline exercise What are the contents of IF/ID, ID/EX, EX/MEM, and MEM/WB at the end of cycle 5? 24 lw $10, 20($1) 28 sub $11, $2, $3 32 and $12, $4, $5 36 or $13, $6, $7 40 add $14, $8, $9 IF/ID Field Value PC+4 44 Instruction add $14, $8, $9 We’ll use a ‘?’ to indicate that a value cannot be known with the information we have. An ‘X’ indicates a “don’t care” for data that we can calculate, but don’t need.

7 Pipeline exercise 24 lw $10, 20($1) 28 sub $11, $2, $3
32 and $12, $4, $5 36 or $13, $6, $7 40 add $14, $8, $9 What are the contents of IF/ID, ID/EX, EX/MEM, and MEM/WB at the end of cycle 5? ID/EX Field Value PC+4 RegWrite Instruction MemtoReg branchTarget MemRead Read Data 1 MemWrite Read Data 2 ALUSrc Immediate ALUOp RegisterRs RegDst RegisterRt RegisterRd

8 Pipeline exercise 24 lw $10, 20($1) 28 sub $11, $2, $3
32 and $12, $4, $5 36 or $13, $6, $7 40 add $14, $8, $9 What are the contents of IF/ID, ID/EX, EX/MEM, and MEM/WB at the end of cycle 5? ID/EX Field Value PC+4 40 RegWrite 1 Instruction or $13,$6,$7 MemtoReg branchTarget X MemRead Read Data 1 ? MemWrite Read Data 2 ALUSrc Immediate ALUOp 10 RegisterRs 6 RegDst RegisterRt 7 RegisterRd 13

9 Pipeline exercise 24 lw $10, 20($1) 28 sub $11, $2, $3
32 and $12, $4, $5 36 or $13, $6, $7 40 add $14, $8, $9 What are the contents of IF/ID, ID/EX, EX/MEM, and MEM/WB at the end of cycle 5? EX/MEM Field Value PC+4 Instruction RegWrite MemtoReg MemRead MemWrite ALUResult writeData writeRegister

10 Pipeline exercise 24 lw $10, 20($1) 28 sub $11, $2, $3
32 and $12, $4, $5 36 or $13, $6, $7 40 add $14, $8, $9 What are the contents of IF/ID, ID/EX, EX/MEM, and MEM/WB at the end of cycle 5? EX/MEM Field Value PC+4 36 Instruction and $12,$4,$5 RegWrite 1 MemtoReg MemRead MemWrite ALUResult ? writeData writeRegister 12

11 Pipeline exercise 24 lw $10, 20($1) 28 sub $11, $2, $3
32 and $12, $4, $5 36 or $13, $6, $7 40 add $14, $8, $9 What are the contents of IF/ID, ID/EX, EX/MEM, and MEM/WB at the end of cycle 5? MEM/WB Field Value PC+4 Instruction RegWrite MemtoReg writeDataMem writeDataALU writeRegister

12 Pipeline exercise 24 lw $10, 20($1) 28 sub $11, $2, $3
32 and $12, $4, $5 36 or $13, $6, $7 40 add $14, $8, $9 What are the contents of IF/ID, ID/EX, EX/MEM, and MEM/WB at the end of cycle 5? MEM/WB Field Value PC+4 32 Instruction sub $11,$2,$3 RegWrite 1 MemtoReg writeDataMem ? writeDataALU writeRegister 11

13 Pipeline exercise 24 lw $10, 20($1) 28 sub $11, $2, $3
32 and $12, $4, $5 36 or $13, $6, $7 40 add $14, $8, $9 MEM/WB Field Value PC+4 Instruction RegWrite MemtoReg writeDataMem writeDataALU writeRegister What is the contents of the MEM/WB register at the end of cycle 4?

14 Pipeline exercise 24 lw $10, 20($1) 28 sub $11, $2, $3
32 and $12, $4, $5 36 or $13, $6, $7 40 add $14, $8, $9 MEM/WB Field Value PC+4 ? Instruction lw $10,20($1) RegWrite 1 MemtoReg writeDataMem writeDataALU writeRegister 10 What is the contents of the MEM/WB register at the end of cycle 4?

15 Forwarding exercise Consider the following sequence of instructions.
add $1,$5,$3 sw $1,0($2) lw $1,4($2) add $5,$5,$1 sw $1,0($2) Assume we have no forwarding or other hazard detection. Insert NOOPs into the instruction sequence to ensure correct execution.

16 Forwarding exercise Consider the following sequence of instructions.
add $1,$5,$3 noop noop sw $1,0($2) lw $1,4($2) noop noop add $5,$5,$1 sw $1,0($2) Now assume we have forwarding and can stall as necessary. Construct the pipeline diagram for the original instruction sequence, indicating where forwards are made if necessary.

17 Forwarding exercise Consider the following sequence of instructions.
Now assume we have forwarding and can stall as necessary. Construct the pipeline diagram for the instruction sequence, indicating where forwards are made if necessary. add $1,$5,$3 sw $1,0($2) lw $1,4($2) add $5,$5,$1 sw $1,0($2) cycle 1 2 3 4 5 6 7 8 9 10 add IF ID EX MEM WB sw lw STALL

18 Branch prediction exercise
Consider the following sequence of instructions (with their 8-bit addresses indicated on the left). Before this snippet executes, the value of $s0 is always 5, $s1 is always 0, and $s2 is always 1. Imagine that this code snippet is executed twice in a processor which uses a 1-bit branch prediction buffer initialized to not taken. Let’s find out how many mis- predictions will we make over the two executions. L1: sub $s0, $s0, $s bne $s0, $s1, L1 add $s2, $s2, $s2

19 Branch prediction exercise
First of all, let’s construct our initial 1-bit BPB. How many indexing bits does this particular code segment need to uniquely identify the instructions? L1: sub $s0, $s0, $s bne $s0, $s1, L1 add $s2, $s2, $s2

20 Branch prediction exercise
First of all, let’s construct our initial 1-bit BPB. How many indexing bits does this particular code segment need to uniquely identify the instructions? bits! We’ll begin by predicting not taken for every instruction. L1: sub $s0, $s0, $s bne $s0, $s1, L1 add $s2, $s2, $s2 Lower Portion of Address Prediction 0000 0100 1000 1100

21 Branch prediction exercise
Action Prediction Taken 1 Not Taken Over the course of two executions of the code snippet, the branch instruction is taken 8 times and not taken twice. The action and predictions, according to the 1-bit branch prediction buffer, are shown to the right. Our mis-prediction rate is 4/10. What is the mis-prediction rate for a 2-bit branch prediction buffer that is initialized to weakly not taken?

22 Branch prediction exercise
Action Prediction Taken 01 10 11 Not Taken What is the misprediction rate for a 2-bit branch prediction buffer that is initialized to weakly not taken? Our prediction is not as sensitive now – we require multiple wrong decisions to change the prediction. The mis-prediction rate is now 3/10.

23 Branch prediction exercise
Let’s say we have a two-bit branch prediction buffer where every entry is initially weakly not taken. What would the contents of the initially empty branch target buffer look like after a single execution of the code snippet above? L1: sub $s0, $s0, $s bne $s0, $s1, L1 add $s2, $s2, $s2 Lower Portion of Address Prediction 0000 01 0100 1000 1100

24 Branch prediction exercise
Let’s say we have a two-bit branch prediction buffer where every entry is initially weakly not taken. What would the contents of the initially empty branch target buffer look like after a single execution of the code snippet above? Lower Portion of Address Prediction 0000 01 0100 10 1000 1100 L1: sub $s0, $s0, $s bne $s0, $s1, L1 add $s2, $s2, $s2 Lower Portion of Address Tag Target 0000 0100 1101 L1 1000 1100

25 Branch prediction exercise
L1: sub $s0, $s0, $s bne $s0, $s1, L1 add $s2, $s2, $s2 Lower Portion of Address Prediction 0000 01 0100 1000 1100 Lower Portion of Address Tag Target 0000 0100 1000 1100 Given the instructions above, and the initially empty BTB and weakly not-taken BPB, draw the pipeline diagram for a single execution of the code snippet, assuming branch prediction happens in the IF stage.

26 Branch prediction exercise
L1: sub $s0, $s0, $s bne $s0, $s1, L1 add $s2, $s2, $s2 cycle 1 2 3 4 5 6 7 8 9 10 11 12 13 sub IF ID EX MEM WB bne add …

27 Branch prediction exercise
L1: sub $s0, $s0, $s bne $s0, $s1, L1 add $s2, $s2, $s2 cycle 7 8 9 10 11 12 13 14 15 16 17 18 19 sub IF ID EX MEM WB bne

28 Branch prediction exercise
L1: sub $s0, $s0, $s bne $s0, $s1, L1 add $s2, $s2, $s2 cycle 12 13 14 15 16 17 18 19 20 21 22 23 24 bne IF ID EX MEM WB sub add

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