1. Lecture 05 – Adding and remembering
“And you do Addition?” the White Queen asked. “What's one and one and one and one and one and one and one and one and one and one?”
“I don't know,” said Alice. “I lost count.”
“She can't do Addition,” the Red Queen interrupted.
from Through the Looking-Glass by Lewis Carroll
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

2. Assignment Lab 01 due beginning of lab next Monday/Tuesday
Homework due Wednesday, 11:58pm
Start reading Chapter 3 for next week
15 clickers recorded, but without associated student name
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

3. Digital Logic
Built on a system of two values; those values can be interpreted as
Positive voltage and zero volts (ground)
High and low
True and false
Asserted and not asserted
Underneath it’s all analog and in our case wires, devices, and electrons
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

4. but paddling like hell underneath
Digital logic behavior, a joy to behold,
Abstraction
but paddling like hell underneath
to make it happen.
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

5. Active high and Active low
Electronic circuits operate on voltages rather than logic levels
Every truth table has two interpretations in voltage levels
General concept:
Assume logic 1 is represented by a higher voltage than logic 0: called Active High or Positive Logic
To assert an active high signal, place a higher voltage on the wire and it is treated as a logic 1
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

6. active High and active Low
Alternatively:
A low voltage can be used to denote that a signal is asserted and high voltage when not asserted
Truth table comparison
Voltage truth table Positive Logic Negative Logic F F F A B F
Low 1
High
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

7. active high and Active Low
Also, for external inputs to a logic circuit we can adopt a view of active high/low with respect to the user’s assertion action
Typically, push the button is assertion and “active”
What voltage level is generated by asserting the button?
If low voltage output signal when push, then user input is Active Low
If high voltage when push, then Active High
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

8. AcTiVe HiGh and AcTiVe LoW
Very real possibility of confusion
Avoid mixing positive and negative logic in a design when possible (Not always possible)
Can adopt the convention that gates are positive logic then
Place a “bubble” on an input or output that is to be asserted low
Label a signal as X’ if it is asserted with a low voltage
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

9. aCtIvE hIgH AND aCtIvE lOw
At the root of it all is duality in Boolean logic =
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

10. Active high/low mechanical switch input examples: define push to mean assert input
Output = V2 = +5volts*R2/(R1 + R2)
Active high Output Active low Output
 Normally closed switch
 Symbol for Ground, 0 volts 
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

11. What is the most common operation?
What single operation occurs most frequently in all of computing?
Addition
What hardware circuit can do this?
Have a way to do Boolean algebra. So, we can do some basic logic. Incidentally, Boolean algebra isn’t even sufficient for first order logics – lacks quantifiers (eg, for all and there exists)
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

12. Binary addition – half adder
To start circuit design, try adding just 2 bits
Carry in
Addend
Augend
Sum
Carry out 1
Addend
Augend
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

13. Binary addition – full adder
Adds carry in
Addend
Half adder
Half adder
Sum
Augend
(sum of 3-bits)
Carry
Carry
This weighted position will Propagate a carry-in = 1
This weighted position will Generate a carry = 1
Addition we do all the time. Speed of this operation is very important. How many gate delays for this circuit?
Generate: addition will always carry
Propagate: Carry only if is an input carry (can also be defined as P’(A,B)= A XOR B
Carry of i+1 = Generate of i + (Propagate of i AND Carry of i)
Logic gets increasingly complicated as bit number increases. Usually in 4-bit modules and arranged hierarchically
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

14. 4-bit adder circuit via Replication
Input of 4-bit addend A3A2A1A0 and augend B3B2B1B0
Output carry C3
Carry in
Replication is the HW Engineer’s friend, just like Iteration is the SW developer’s friend.
MSB
Output of 4-bit sum S3S2S1S0
LSB
Circuit propagation delay (units of gate delays) =
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

15. 64-bit ripple carry adder circuit
Replicate 4-bit ripple carry adder 16 times
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

16. 8-bit microprocessor in IBM 90
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

17. PDP-8 computer; used switches to input instructions as 1/0 strings for initial bootup; first sold in 1965
Developer Digital Equipment Corporation Product family Programmable Data Processor Type Minicomputer
Release date March 22, 1965
Introductory price $18,500, equivalent to about $140,000 in 2016
Units sold 50,000+
Switches to input binary string
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

18. After ADD, what capability is most essential?
Here, ADD stands for all information processing capabilities
A computer that can ADD and perform other operations can execute our code autonomously (on its own, without us inputting each instruction manually) if it has …
MEMORY
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

19. Gate specifications (specs)
To ensure gate operation in a wide variety of environments, extensive engineering and measurement
Gate speed is always of interest
Propagation delay – elapsed time from a gate input change until a gate output change
May not be symmetric: Low to high transition TPLH may take longer than H to L, TPHL, or vice versa
Input changes that do not cause an output change do not define TPLH or TPHL
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

20. Look 7400 NAND Data Sheet (specs)
Here is the data sheet from Texas Instruments
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

21. Logic Circuits
Combinational logic – implements functions of logic inputs to generate a result or output (defined by its truth table)
Nice, but a logic circuit will be more powerful if its output can also be a function of time
What does it mean for a function to include time as an input? For a circuit?
Function and circuit behavior will depend on HISTORY
The book calls it combinatorial, I just can’t do it.
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

22. A photo of me, when I was younger
Looking at history here, of course.
This photo is a memory.
Looking for a circuit with memory.
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

23. Experience more recent history
Courtesy the circuits of the LWSN B151 document cam
I move my hands so that you can look directly at them to see them moving and you can also see them moving in the projected video from the document cam
You clearly see that the video is a fraction of a second behind the motion of my waving hands as seen directly by your eyes
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

24. History as location We can go looking for history in digital circuits
Where is history in our Lab 01 circuit?
Let inputs = Now 
Here is response to the
inputs of
10ns ago
Here is 
20ns ago
Here is  30ns ago
Here is  35ns ago
First cut at timing depicting needs a tweak. Circuit tweaked by moving NAND4.
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

25. Memory is History, recalled
Gate output is history and a function of input
Memory functions after the historic event
How to build memory into a digital circuit?
Feedback: connect output to input
Look at simplest example, let IN = 0 at start
Plot IN and OUT as a function of time
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

26. Try again Want stable memory rather than oscillation
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

27. Two ways to present a feedback loop
Circular
Twisted
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

28. Now control the starting condition
Use NAND as inverter most of the time
A zero input will force a “starting condition”
Two inputs: Set, S, makes output Q= and Reset, R, makes output Q=0
S’ and R’ Inputs are active low
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

29. Set-Reset Latch
Text figure 2.14 contains a basic feedback circuit of two NAND gates with their outputs connected to an input of the other gate
Similar to recursion
Feedback of a circuit output (history of action) to an input carries that history of a circuit back to a circuit input (the present)
Bringing history to the present is MEMORY
Analyze this NAND gate feedback circuit in time
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

30. Switch terminology
Pole – number of separate circuits controlled by a single actuator; one “pole” per circuit
Often convenient to “gang” switches of several circuits into a single actuator
Control many with one action
Throw – number of connection path choices, other than OPEN, for each pole
Only “gang” circuits that need the same number of connection choices
The moving part of a switch implements the throws
Look at disassembled PUSHBUTTON switch
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

31. Switch examples Single-pole, single-throw (SPST)
Single-pole, double throw (SPDT)
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

32. Mechanical switches “bounce”
When the moving “throw” makes contact with one of the connection choices, that mechanical interaction usually bounces
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

33. What the LED in Lab 01 really does
Lab 01 circuit has mechanically switched inputs driving the logic defined by the circuit and table
Imagine switches for A and B not pushed, A=B=1
Now push switch for B, which bounces, e.g., , then from truth table LED goes (initially) Off, On, Off, On, Off, On (now stable) A B
A XNOR B
LED 1 On
Off
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

34. Look at SR latch in Lab 02 SR latch is a 1-bit memory
Characteristic table, below left
Excitation table, right
S’ (active low) R’
Q(t)
Q(t+1) 1 X
1 (set)
0 (reset)
Not allowed
Characteristic table is simply a state table
Excitation table shows minimum inputs necessary to generate (“excite” it) to next state
Q(t)
Q(t+1) S’ R’ 1 X
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

35. SR latch,Lab 02 a, contact S’ b, no contact c, contact R’
+5 V
+5 V
a, contact S’
b, no contact
c, contact R’
Using a single-pole, double-throw switch to drive S’ and R’ inputs
S’ (active low) R’
Q(t)
Q(t+1) 1 X
1 (set)
0 (reset)
Not allowed
Q(t)
Q(t+1) S’ R’ 1 X
b, c a
b, a c
Simultaneous a and c
mechanically impossible
by design
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

36. Data latch
Build on the SR latch idea for more useful operational characteristics
Fig when Enable momentarily goes high, circuit samples value of Data In and stores it in SR latch and presents that value on Output
This leads to “clocked” circuits, which we’ll discuss next time
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

37. Register – fast storage of a bit string
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra

38. Summary Active high and active low discussed
Half-adder to a 64-bit ripple carry adder: hardware handles bigger data through replication of circuits for smaller data
Memory solves the bouncing switch problem
Feedback is a new fundamental concept showing how to build a circuit with memory
© 2017 by George B. Adams III
Portions © 2017 Dr. Jeffrey A. Turkstra