1. Assembly Language Ms. V.Anitha AP/CSE SCT

2. FDP on " Computer Architecture" Prof. V.Anitha, SCT
Assembly Language
Basic Elements of Assembly Language
Labels
Mnemonics and Operands
Comments
Reserved words and identifiers
Directives
Two-Pass Assembler
FDP on " Computer Architecture" Prof. V.Anitha, SCT

3. It’s hard to write code in 1’s & 0’s!
Machine Instructions are patterns of 0s and 1s.
Symbolic names are used to represent patterns.
( eg., MOV,ADD,INC)
A Complete set of symbolic names and rules for their use is called
Assembly Language.
FDP on " Computer Architecture" Prof. V.Anitha, SCT

4. FDP on " Computer Architecture" Prof. V.Anitha, SCT
Assembler
Each line of assembly language (Source Program) is translated into a single Machine Language(Object Program) instruction.
A program called the Assembler does the translation and provides useful tools.
Assembler
Source Program
Object Program
FDP on " Computer Architecture" Prof. V.Anitha, SCT

5. Assembly Language Instructions
Assembled into machine code by assembler
Executed at runtime by the CPU
Format
LABEL OPCODE OPERANDS ; COMMENTS
Label (optional)
Mnemonic (required)
Operand (depends on the instruction)
Comment (optional)
Examples
MOVE R0,SUM
ADD #5,R3
ADDI 5,R3
MOVE #5,(R2)
FDP on " Computer Architecture" Prof. V.Anitha, SCT

6. FDP on " Computer Architecture" Prof. V.Anitha, SCT
Labels
Is an optional name associated with the memory address.
Act as place markers.
marks the address (offset) of code and data
Code label
Data label
FDP on " Computer Architecture" Prof. V.Anitha, SCT

7. Mnemonics and Operands
Instruction Mnemonics
memory aid
examples: MOV, ADD, SUB, MUL, INC
Operands
constant value (96)
immediate value (#5)
constant expression (2+4)
Register ( R1)
memory (data label) (count)
FDP on " Computer Architecture" Prof. V.Anitha, SCT

8. FDP on " Computer Architecture" Prof. V.Anitha, SCT
Comments
Explain the program's purpose
When it was written, and by whom
Revision information
Tricky coding techniques
Application-specific explanations
Single-line / multiline comments
Begin and end with the same programmer-chosen character
Is ignored by the assembler program.
FDP on " Computer Architecture" Prof. V.Anitha, SCT

9. Reserved Words and Identifiers
Reserved words cannot be used as identifiers
Instruction mnemonics (MOV), directives
attributes (BYTE, WORD), operators (=)
Predefined symbols
Identifiers
1-247 characters, including digits
not case sensitive
first character must be a letter, ?, or $
Examples: var1, Count, $first,
FDP on " Computer Architecture" Prof. V.Anitha, SCT

10. FDP on " Computer Architecture" Prof. V.Anitha, SCT
Directives
Commands that are recognized and acted upon
by the assembler.
Used to declare code, data areas.
Not case sensitive.
Different assemblers have different directives.
Examples:DATAWORD,EQU
FDP on " Computer Architecture" Prof. V.Anitha, SCT

11. FDP on " Computer Architecture" Prof. V.Anitha, SCT
Directives cont…
EQU directive
name EQU expression
name EQU symbol
name EQU <text>
Define a symbol as either an integer or text expression.
Can be useful for non-integer constant
Cannot be redefined
FDP on " Computer Architecture" Prof. V.Anitha, SCT

12. FDP on " Computer Architecture" Prof. V.Anitha, SCT
Example
FDP on " Computer Architecture" Prof. V.Anitha, SCT

13. FDP on " Computer Architecture" Prof. V.Anitha, SCT

14. Suggested Coding Standards
Some approaches to capitalization
capitalize nothing
capitalize everything
capitalize all reserved words, including
instruction mnemonics and register names
capitalize only directives and operators
Other suggestions
descriptive identifier names
spaces surrounding arithmetic operators
blank lines between procedures
FDP on " Computer Architecture" Prof. V.Anitha, SCT

15. Suggested Coding Standards Cont….
Indentation and spacing
code and data labels – no indentation
executable instructions – indent 4-5 spaces
comments: begin at column 40-45, aligned
1-3 spaces between instruction and its operands
FDP on " Computer Architecture" Prof. V.Anitha, SCT

16. FDP on " Computer Architecture" Prof. V.Anitha, SCT
The Assembly Process
Objective
Translate the AL (Assembly Language) program
into ML (Machine Language).
Each AL instruction yields one ML instruction word.
Problem
An instruction may reference a label.
If the label hasn’t been encountered yet, the assembler
can't form the instruction word
Solution
Two-pass assembly
FDP on " Computer Architecture" Prof. V.Anitha, SCT

17. FDP on " Computer Architecture" Prof. V.Anitha, SCT
Two-Pass Assembly - 1
First Pass - generating the symbol table
Scan each line
Keep track of current address
Increment by 1 for each instruction
For each label
Enter it into the symbol table
Allocate to it the current address
Stop when .END is encountered
FDP on " Computer Architecture" Prof. V.Anitha, SCT

18. FDP on " Computer Architecture" Prof. V.Anitha, SCT
Two-Pass Assembly - 2
Second Pass - generating the ML program
Scan each line again
Translate each AL instruction into ML
Look up symbols in the symbol table instruction
Ensure that labels are no more than +256 / -255 lines from instruction
Determine operand field for the instruction
Fill memory locations as directed by pseudo-ops
Stop when .END is encountered
FDP on " Computer Architecture" Prof. V.Anitha, SCT

19. FDP on " Computer Architecture" Prof. V.Anitha, SCT
Symbol Table Example
Symbol
Address
LOOP
112
SUM
200 N
204
NUM1
208
FDP on " Computer Architecture" Prof. V.Anitha, SCT

20. FDP on " Computer Architecture" Prof. V.Anitha, SCT
Thank You…
FDP on " Computer Architecture" Prof. V.Anitha, SCT