1. ECE 353 Introduction to Microprocessor Systems
Week 3
Michael J. Schulte

2. Topics 80C188EB Organization (continued) 80C188EB Machine Language
Segmentation
Reset Processing
Programmer’s Model
80C188EB Machine Language
80C188EB Assembly Language and Assemblers
80C188EB Debuggers

3. 80C188EB/ 80C186EB Implementation

4. Segmented Memory Architecture
Memory Segmentation
Logical vs. Physical Addresses
Segment Organization
Topologies
Disjoint
Overlapping
Identical
Physical Address Generation
Advantages
Disadvantages

5. 80C188EB Architecture

6. 80C188EB Programmer’s Model

7. Programming Programming Languages Machine Language Instructions HLL
Assembly Language
Machine Language
Machine Language Instructions
1 – 6 bytes in length
Encoding

8. Assembler Primer Assembler Types General Instruction Syntax
Native Assembler
Cross Assembler
General Instruction Syntax
Assembler Functions

9. Example Program Hardware

10. Source Code File .186 ;use 80186 instructions
SWITCHES equ 1234h ;define symbols
LEDS equ 5678h
assume cs:code ;establish CS addressability
code segment ;start of code segment
main: mov dx, SWITCHES ;load switch port address
in al, dx ;read switches
not al ;switch off turns LED on
mov dx, LEDS ;load LED port address
out dx, al ;write to LED port
jmp main ;and repeat indefinitely
code ends ;end of code segment
end main ;code entry point is at main

11. Assembler Listing File (page 1)
Turbo Assembler Version /12/01 08:49: Page week3.ASM
;use instructions 2
=1234 SWITCHES equ h ;define symbols
=5678 LEDS equ h 5
6 assume cs:code ;establish CS addressability 7
code segment ;start of code segment 9
BA 1234 main: mov dx, SWITCHES ;load switch port address
EC in al, dx ;read switches
F6 D0 not al ;SW=1 --> LED on
BA 5678 mov dx, LEDS ;load LED port address
EE out dx, al ;write to LED port
15 000A EB F4 jmp main ;and repeat indefinitely 16
17 000C code ends ;end of code segment 18
19 end main ;code entry point is at main

12. Assembler Listing File (page 2)
Turbo Assembler Version /12/01 08:49: Page 2
Symbol Table
Symbol Name Type Value
??DATE Text "09/12/01"
??FILENAME Text "week3 "
??TIME Text "08:49:11"
??VERSION Number 040A
@CPU Text H
@CURSEG Text CODE
@FILENAME Text WEEK3
@WORDSIZE Text 2
LEDS Number 5678
MAIN Near CODE:0000
SWITCHES Number 1234
Groups & Segments Bit Size Align Combine Class
CODE C Para none

13. Code Generation Process

14. Intel Hex Record Format
:0C000000BA3412ECF6D0BA7856EEEBF4ED
: FF
Record Mark
Record Length
Load Address or 0000
Record Type
Data
Checksum
Record Description : 02
0000
1000 EC
Extended address record 0C 00
BA3412ECF6D0BA7856EEEBF4 ED
Data record 01 FF
End-of-file record
Disassembling the data record payload.
BA3412(mov dx, 1234h)EC(in al, dx)F6D0(not al) BA7856(mov dx, 5678h)EE(out dx, al)EBF4(jmp –12)

15. Borland Development Tools

16. Debugger Primer So, why is it called a bug, anyway? Terminology
Typical Debugger Operation
Debugging Tools
Software
Hardware
Comparison of Debugging Tools

17. Code Development Tips
Use structured programming methods - no spaghetti code.
Use descriptive symbols and names.
Write comments as you go (or before!).
When fixing assembler errors, fix only the top one or two and re-assemble – a lot of the later errors may be due to the first few.
When debugging, verify what the registers are loaded with as compared to what you think they should be loaded with.

18. Instruction Decoding Exercise
The following memory dump was obtained from an 80C188EB-based system
CS:0013 is a valid instruction
Decode the memory data to determine the instructions that were assembled to produce it.
CS: B0 12 BA FE C7 EB F7

19. Instruction Decoding Solution

20. Wrapping Up Homework #2 due Friday 2/18 Reading for next week
Chapter 6

21. 80C188EB Instruction Encoding
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
LOW DISP/DATA
HIGH DISP/DATA
LOW DATA
HIGH DATA
OPCODE D W
MOD
REG
R/M
Register operand/registers to use in EA calculation
Register operand/extension of opcode
Register mode/memory mode with displacement length
Word/byte operation
Direction is to register/direction is from register
Operation (instruction) code [opcode]

22. JMP Instruction Encoding

23. INC Instruction Encoding

24. Debugging Tools
maybe
yes

25. Disjoint Segments
00000h
FFFFFh CS DS SS

26. Overlapping Segments
00000h
FFFFFh CS DS SS

27. Identical Segments
00000h
FFFFFh CS DS SS

28. JTAG Boundary Cell

29. Simulator
Runs on a host computer, and simulates execution of your code. No actual hardware required.
Strengths
Weaknesses

30. Native Debugger
Code is executed on a host computer with a compatible instruction set.
Strengths
Weaknesses

31. Resident Monitor
Monitor is a stand-alone program that runs on the UUT, typically communicates over serial interface to a terminal.
Strengths
Weaknesses

32. Remote Debugger
Similar to resident monitor, but only small debugger kernel on UUT. Main debugger software runs on a host computer connected to the UUT.
Strengths
Weaknesses

33. ROM Emulator
Hardware plugs into ROM socket on UUT. Usually has serial connection to host computer.
Strengths
Weaknesses

34. Target Access Probe
Replaces the CPU on UUT. Connected to host computer for control.
Strengths
Weaknesses

35. In-Circuit Emulator Strengths Weaknesses
Replaces UUT CPU with hardware that gives full control of CPU pins (i.e. can run arbitrary bus cycles). Often contain overlay memory to allow testing of software before system hardware is available. May clamp over existing CPU that is soldered in place.
Strengths
Weaknesses

36. JTAG Emulators
Special serial interface to a device originally proposed just for testing (IEEE Std )
Boundary Scan
Emulation Scan
Strengths
Weaknesses