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Bart Rem Ajeesh Gopalakrishnan Tom Geelen Herman Roebbers

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1 Bart Rem Ajeesh Gopalakrishnan Tom Geelen Herman Roebbers
Automatic Handel-C Generation from MATLAB® and Simulink® for Motion Control with an FPGA Bart Rem Ajeesh Gopalakrishnan Tom Geelen Herman Roebbers TU/e Philips TASS

2 Outline Introduction Model Driven Development & Testing
Project & System Model Driven Development & Testing Code Generation From FSM and Simulink models Code Verification Results

3 Context Workshop Software/System Engineering ‘04
Industry project conducted at the TU/e as part of the Software Technology post-Master program Customer: Philips TASS

4 Project Setting Try Embedded Motion Control with an FPGA
Motion control system: an Automatic Document Feeder, provided by Océ FPGA: Celoxica RC203 board, with a Xilinx Virtex II FPGA.

5 Automatic Document Feeder
Scanning Section ADF (Automatic Document Feeder)

6 Automatic Document Feeder
Typical Paper Path Paper Original Perforated Suction Belt Glass Plate

7 Model Driven Development
ADF Controller Model ADF Model Test ADF Controller Handel-C (Sim.) ADF Model Verify Impl. Software-in-the-Loop Hardware-in-the-Loop ADF Controller Handel-C (FPGA) ADF Model (RT Simulation) Verify RT

8 ADF Case Controller (Model) Machine (Model) State Machine (text file)
Motor Controllers (Simulink) Motor Models (Simulink) Paper Path Model (Simulink) Handel-C

9 State Machine → Handel-C
FSM2HC FSM Spec. Handel C Parser Handel-C Generator Reader Editor Writer Tem- plates

10 ADF Case Controller (Model) Machine (Model) State Machine (text file)
Motor Controllers (Simulink) Motor Models (Simulink) Paper Path Model (Simulink) Handel-C

11 Simulink → Handel-C Simulink: Autonomously operating, connected blocks
CSP-like! Handel-C: processes with channels chan int 32 a, b; par { while (1) { a?x; b!x; } ...

12 Simulink → Handel-C Libs (.mdl) Consts (.m) MDL2HC Model (.mdl) Parser
(.hcc) Code Generator Type Checker Block Lib (.hch)

13 Simulink → Handel-C Supports the basic data types
Integers, Booleans, Fixed-point But no vectors or other compound types Supports most common blocks Constant, Gain, Logic, Saturate, Step, UnitDelay, … Triggered & Enabled subsystems Library blocks Supports most block parameters

14 Software in the Loop Celoxica DK Handel C MATLAB Simulink Model
ADF Controller Model ADF Model Test Handel-C (Sim.) Verify Impl. Handel-C (FPGA) (RT Simulation) RT Celoxica DK Handel C MATLAB Simulink Model Co-Simulation Manager

15 Hardware in the Loop Real ADF FPGA xPC Target Voltage Conversion
ADF Controller Model ADF Model Test Handel-C (Sim.) Verify Impl. Handel-C (FPGA) (RT Simulation) RT Real ADF FPGA xPC Target Compiled ADF Model Handel-C Voltage Conversion 5 MHz sampling! 20 kHz

16 Tests Done Pure Matlab Software in the Loop Co-Sim
Hardware in the Loop Real ADF 1 Motor 1 Motor + Paper path Complete System

17 Results Working Result: An FPGA can handle a serious motion control task Automatic Handel-C code generation From MATLAB Simulink From text based FSM spec Verification at multiple levels

18 Future Work Optimize FPGA size Support more features in MDL2HC
Use signals in stead of channels Optimize Simulink model (X bits vs. 32 bits) Support more features in MDL2HC Blocks, compound types, parameters Replace xPC with a second FPGA → WSSE 2005…

19 Acknowledgements The Software Technology program (TU/e)
The OOTI Fellows of Generation 2003 Philips TASS Océ Technologies B.V. Celoxica Ltd. The MathWorks Benelux B.V. The Boderc Project (ESI)


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