1. Implementation of Delta Frame Generator using LabVIEW FPGA Project Progress Presentation
NI 9605 board
Ethernet Cable
Host PC
LabVIEW GUI
FPGA chip
Processor
Student: Anjan Mahat
Supervisor: Dr. Fearghal Morghan
Co-supervisor: Dr. Martin Glavin

2. Overview Goals LabVIEW FPGA Background Task completed Future Work
Outstanding Issue

3. Goals Learn and implement LabVIEW with NI 9605 Board
Configure Board with LabVIEW
Implement simple program e.g blink LED, Counter
Implement delta frame generator project from EE427
Implement ctrlRegBlk
Implement memCtrlr
Implement dspblk

4. LabVIEW Background
Visual Programming Language produced by National Instruments
LabVIEW code/ program are called Virtual instruments (VIs)
LabVIEW VIs has two major components
Block diagram where you develop the code
Front panel for display and user interaction
To create a VIs graphical blocks are wired together
LabVIEW FPGA uses Xilinx tools to compile VIs
VIs can run on development computer before pointing to FPGA board

5. Task completed
Investigated if Digilent Spartan 3e board was supported by LabVIEW – not supported
Commissioned NI 9605 FPGA board
Driver setup using NI Measurement & Automation Explorer(MAX)
Learned and applied LabVIEW With NI 9605 FPGA Module
Commissioned flashing LED – created tutorial document available in project website
Designed up-down counter

6. Task completed Functional partition LabVIEW design for 8 bit counter

7. Future Work
2.3 memCtrlr diagram
2.1 ctrlRegBlk diagram

8. Future Work 2.3 dspBlk diagram

9. Outstanding issues Understand how to implement asynchronous reset
How does the Ethernet work?
How to debug in LabVIEW?