1. Computer Organization and Architecture
Chapter 2 Computer Evolution and Performance
Lecture 02
28/09/2015

2. BRIEF HISTORY OF COMPUTERS The First Generation: Vacuum Tubes

3. Vacuum tube
The vacuum tube is a glass tube that has its gas removed which creates a vacuum. Vacuum tubes contain electrodes for controlling electron flow in early computers that used them as a switch or an amplifier.

4. The type of tube used in early computers was called a triode and was invented by Lee De Forest in 1906.
It consists of a cathode and a plate, separated by a control grid, suspended in a glass vacuum tube. The cathode is heated by a red-hot electric filament, which causes it to emit electrons that are attracted to the plate. The control grid in the middle can control this flow of electrons. By making it negative, you cause the electrons to be repelled back to the cathode; by making it positive, you cause them to be attracted toward the plate. Thus, by controlling the grid current, you can control the on/off output of the plate.
Unfortunately, the tube was inefficient as a switch. It consumed a great deal of electrical power and gave off enormous heat—a significant problem in the earlier systems. Primarily because of the heat they generated, tubes were notoriously unreliable—in larger systems, one failed every couple of hours or so.

5. Electronic Numerical Integrator And Computer.
ENIAC - background
Electronic Numerical Integrator And Computer.
ENIAC was the first electronic computer used for general purposes, such as solving numerical problems.
Invented by Eckert and Mauchly
At University of Pennsylvania
To solve Trajectory tables for weapons
The work Started in 1943
Finished 1946
Too late for war effort
Used until 1955

6. ENIAC - details
It was Decimal machine(not binary)
It consisted 20 accumulators of 10 digits
Programmed manually by switches
It contained 18,000 vacuum tubes
Its weights was 30 tons
It occupied 15,000 square feet space
It consumed 140 kW power
Capable of 5,000 additions per second

8. Von Neumann/Turing
The idea was; a computer could get its instructions by reading them from memory, and a program could be set or altered by setting the values of a portion of memory.
This idea, known as the stored-program concept.
The first publication of the idea was in a 1945 proposal by von Neumann for a new computer, the EDVAC (Electronic Discrete Variable Computer).

9. John von Neumann/Turing
John von Neuman was a consultant on ENIAC project.
He, along with his colleagues began the design of a new stored program computer.
It was referred to as IAS computer, at the Princeton Institute for Advanced Studies.
IAS is the prototype of all subsequent general purpose computers.

10. Details of IAS Computer
Stored Program concept
Main memory storing programs and data
ALU operating on binary data
Control unit interpreting instructions from memory and executing
Input and output equipment operated by control unit

11. Structure of von Neumann machine

12. Structure of von Neumann machine- Details
First: CA
Since the device is a computer, it has to perform basic arithmetic operations (+, -, /, *) most frequently. So it should contain a specialized organ for these operations.
A central arithmetical part exists for this purpose , which is CA.
Second: CC
The logical sequencing of the device, i.e. the proper sequencing of its operations is efficiently carried out by a central control organ. There must be a distinction between the instructions which need to be carried out and the central organ which make sure that the instruction is carried out.

13. Control unit acts as traffic manager of the computer
Control unit acts as traffic manager of the computer. This involves control of the input/output devices and transfer of data to and from the primary storage. The control itself is controlled by the individual instructions in programs located in primary storage. Instructions are retrieved from primary storage one at a time. Each instruction is decoded. Effectively, a specific set of "electronic gates" are opened or closed. This permits a series of electronic signals to be transmitted to the proper components that execute the instruction.

14. Third: M
A device which needs to carry out long and complicated sequences of operations must have a considerable memory. R
Outside recording medium of computer.
Fourth: I
To transfer information into its specific parts C and M the computer/device must have an organ. This forms the specific part I.

15. Fifth: O
The device must have organ to transfer information from its specific parts C and M. this organ is O i.e. output

16. IAS Memory Formats:
The memory of the IAS consists of 1000 storage locations, called words, of 40 binary digits (bits) each.
Both data and instructions are stored there.
Numbers are represented in binary form, and each instruction is a binary code.
Each number is represented by a sign bit and a 39-bit value.
A word may also contain two 20-bit instructions, with each instruction consisting of an 8-bit operation code (opcode) specifying the operation to be performed and a 12-bit address designating one of the words in memory (numbered from 0 to 999).

17. IAS Memory Formats

18. Structure of IAS – detail

19. Memory buffer register (MBR):-
                          Contains a word to be stored in memory or sent to the I/O unit, it is used to receive a word from memory or from the I/O unit.
Memory address Register (MAR):-
                           Specifies the address of memory in the word to be written from or read into the MBR.
Instruction register (IR):- 
                           Contains the 8bit Op-code instruction being executed.
Instruction buffer register (IBR):-
                            Employed to hold temporarily the right-hand instruction from a word in memory.
Program counter (PC):-
                            Contains the address of the next instruction-pair to be fetched from memory.

20. Accumulator(AC) and multiplier quotient(MQ):-
Employed to hold  temporarily operands and results of ALU operations. For example, the result of multiplying two 40-bits numbers is an 80 bit number, the most significant 40 bits are stored in the AC and the least significant in the MQ.
Central processing unit(CPU):-
Controls the operation of the computer and performs its data processing functions, often simply referred to as processor.
Input/Output:-
 Moves data between the computer and its external environment.

21. The IAS Instruction Set
The IAS computer had a total of 21 instructions which are listed in the given table.

24. 1947 - Eckert-Mauchly Computer Corporation
Commercial Computers
Eckert-Mauchly Computer Corporation
UNIVAC I (Universal Automatic Computer)
Was intended for both scientific and commercial applications.
Late 1950s - UNIVAC II
Faster
More memory

25. IBM 1953 - the 701 1955 - the 702 Lead to 700/7000 series
IBM’s first stored program computer
Intended for Scientific calculations
the 702
Business applications
Lead to 700/7000 series

26. The Second generation: Transistors

27. 2nd Generation
The invention of the transistor was one of the most important developments leading to the personal computer revolution. The transistor was invented in 1947 and announced in 1948 by Bell Laboratory engineers

28. Transistors
Replaced vacuum tubes
Smaller
Cheaper
Less heat dissipation
Solid State device
Made from Silicon (Sand)
Computer system built with transistors was also much smaller, faster, and more efficient than a computer system built with vacuum tubes.

29. The second generation also saw the introduction of
More complex arithmetic and logic units and control units.
High-level programming languages.
System software with the computer.
The system software provided the ability to
load program
Move data to peripherals
Libraries to perform common computations

30. DEC (Digital Equipment Corporation)- an organization founded in 1957
Mini Computers
DEC (Digital Equipment Corporation)- an organization founded in 1957
It Produced PDP-1
This computer and this company began the idea of mini computers.

31. IBM Product line
From the introduction of the 700 series to the introduction of 7000 series, the IBM product line underwent an evolution.
Successive members of the product line show increased performance, increased capacity, and/or lower cost.
See Table 2.3

33. Data Channels: A data channel is an independent I/O module with its own processor and instruction set. CPU doesnot execute detailed I/O instructions.
Instructions are stored in memory, which are executed by processors in data channel.
CPU initiates an I/O transfer by sending control signal to the data channel. The data channel after performing its task signals the CPU.
This relieves the CPU processing.

34. Multiplexer: it is the central termination point for data channels, the CPU and memory. It schedules access to the memory from CPU and data channels.

35. The Third Generation: Integrated Circuits

36. Microelectronics
Literally - “small electronics”
A computer is made up of gates, memory cells and interconnections
These can be manufactured on a semiconductor
e.g. silicon wafer

37. Since the basic functioning of a digital computer is storage, movement, processing and control functions. Two fundamental types of components are required i.e. gates and memory cells. Gate: is a device that implements a simple Boolean logical functions. Such as if A AND B ARE TRUE THEN C IS TRUE. Memory Cell: is a device that can store one bit of data. By interconnecting large number of these devices, we can construct a computer. These gates and memory cells are constructed of simple digital electronic components.

38. Data Storage: provided by memory cells Data Processing: Provided by gates Data Movement: the paths among components are used to move data from memory to memory and from memory through gates to memory. Control: the path among components can carry control signals. For example: a gate will have one or two data inputs plus a control signal input that activates the gate. When the control signal is ON, the gate performs its function on the data inputs and produces output .

39. Boolean Logic function
Gate
Memory cell .
Boolean Logic function
Output
Input
Output
Input
Read
Write
Activate signal

40. ICs Fabrication
The integrated circuit exploits the facts that digital electronic components such as transistors, resistors and conductors can be fabricated from a semi conductor such as silicon. The entire circuit is fabricated in a tiny piece of silicon rather than assemble discrete components made from separate pieces of silicon into the same circuit.

41. Fig 2.7 Relationship among Wafer, Chip and Gate
A thin wafer of silicon is divided intro matrix of small areas, each a few millimeters square. The identical circuit pattern is fabricated in each area and the wafer is broken up into chips. Each chip consists of many gates and memory cells and a number of input output attachment points. This chip is packaged in housing that protects it and provides pins for attachment to devices beyond the chip. These packages can then be interconnected on Printed circuit board to produce larger or complex circuits.

42. Moore’s Law Increased density of components on chip
Gordon Moore – co-founder of Intel
Number of transistors on a chip will double every year
Since 1970’s development has slowed a little
Number of transistors doubles every 18 months
Cost of a chip has remained almost unchanged
Higher packing density means shorter electrical paths, giving higher performance
Smaller size gives increased flexibility
Reduced power and cooling requirements
Fewer interconnections increases reliability

43. Growth in CPU Transistor Count

44. Replaced (& not compatible with) 7000 series
IBM 360 series
1964
Replaced (& not compatible with) 7000 series
First planned “family” of computers
Similar or identical instruction sets
Similar or identical O/S
Increasing speed
Increasing number of I/O ports (i.e. more terminals)
Increased memory size
Increased cost

45. How could such family concept be implemented?
Based on three factors: basic speed, size and degree of simultaneity
For example, greater speed in the execution of a given instruction would be gained by the use of more complex circuitry in the ALU, allowing sub operations to be carried out in parallel.
Another way of increasing speed was to increase the width of data path between main memory and the CPU.

46. Did not need air conditioned room Small enough to sit on a lab bench
DEC PDP-8
1964
First minicomputer
Did not need air conditioned room
Small enough to sit on a lab bench
Could not do everything the mainframe could
$16,000 cost- cheap enough
$100k+ for IBM 360
BUS STRUCTURE

47. DEC - PDP-8 Bus Structure

48. Generations of Computer
Vacuum tube
Transistor
Small scale integration on
Up to 100 devices on a chip
Medium scale integration - to 1971
100-3,000 devices on a chip
Large scale integration
3, ,000 devices on a chip
Very large scale integration
100, ,000,000 devices on a chip
Ultra large scale integration –
Over 100,000,000 devices on a chip

49. Memory
In 1950s and 1960s, computer memory was constructed from tiny rings of ferromagnetic material.
Ring was called core.
It was expensive, bulky and used destructive readout- a simple act of reading a core erased the data stored in it. So circuits were installed to restore the data as soon as it had been extracted.

50. In 1970s Fairchild produced semiconductor memory.
Size of a single core
i.e. 1 bit of magnetic core storage
Holds 256 bits
Non-destructive read
Much faster than core
Capacity approximately doubles each year

51. Intel
First microprocessor
All CPU components on a single chip
4 bit – lt can add two 4-bit numbers and can multiply on.ly by repeated addition
Followed in 1972 by 8008
8 bit
Both designed for specific applications
Intel’s first general purpose microprocessor

52. Microprocessor Speed-Speeding it up
Pipelining- with pipelining, a processor can simultaneously work on multiple instructions.
For example, while one instruction is being executed the computer is decoding the next instruction.
Branch prediction- the processor looks ahead in the instruction code fetched from memory and predicts which branches or group of instructions are likely to be processed next. The processor pre fetch the correct instructions and buffer them and is kept busy.

53. Data flow analysis- the processor analyzes which instructions are dependent on each other’s result or data, to create an optimized schedule of instructions. This prevents unnecessary delay.
Speculative execution- using branch prediction and data flow analysis, some processors speculatively execute instructions ahead of their actual appearance in the program execution, holding the results in temporary locations. This enables the processor to keep its execution engines as busy as possible.

54. Performance Balance
Processor speed increased
Memory capacity increased
Memory speed lags behind processor speed

55. Increase number of bits retrieved at one time
Solutions
Increase number of bits retrieved at one time
Make DRAM “wider” rather than “deeper”
Change DRAM interface by introducing Cache.
Reduce frequency of memory access
More complex cache and cache on processor chip or cache close to processor chip
Increase the interconnection bandwidth between processor and memory by using high speed buses.

56. Another Area of Design Focus-I/O Devices
Peripherals with intensive I/O demands
Large data throughput (Throughput is a measure of how many units of information a system can process in a given amount of time) demands
Processors can handle the data pumped out by these devices
Problem is moving data between processor and peripheral.
Solutions:
Caching
Buffering
Higher-speed interconnection buses
More elaborate bus structures
Multiple-processor configurations

57. Typical I/O Device Data Rates

58. Key is Balance
Processor components
Main memory
I/O devices
Interconnection structures

59. Improvements in Chip Organization and Architecture
Increase hardware speed of processor
Fundamentally due to shrinking logic gate size
More gates, packed more tightly, increasing clock rate
Propagation time for signals reduced
Increase size and speed of caches
Dedicating part of processor chip
Cache access times drop significantly
Change processor organization and architecture
Increase effective speed of execution
Parallelism

60. Problems with Clock Speed and Logic Density
Power
Power density increases with density of logic and clock speed
Dissipating heat
RC delay
Speed at which electrons flow limited by resistance and capacitance of metal wires connecting them
Delay increases as RC product increases
Wire interconnects thinner, increasing resistance
Wires closer together, increasing capacitance
Memory latency
Memory speeds lag processor speeds
Solution:
More emphasis on organizational and architectural approaches

61. Intel Microprocessor Performance

62. Increased Cache Capacity
Typically two or three levels of cache between processor and main memory
Chip density increased
More cache memory on chip
Faster cache access
Pentium chip devoted about 10% of chip area to cache
Pentium 4 devotes about 50%

63. More Complex Execution Logic
Enable parallel execution of instructions
Pipeline works like assembly line
Different stages of execution of different instructions at same time along pipeline
Superscalar allows multiple pipelines within single processor
Instructions that do not depend on one another can be executed in parallel

64. Internal organization of processors complex
Diminishing Returns
Internal organization of processors complex
Can get a great deal of parallelism
Further significant increases likely to be relatively modest
Benefits from cache are reaching limit
Increasing clock rate runs into power dissipation problem
Some fundamental physical limits are being reached

65. New Approach – Multiple Cores
Multiple processors on single chip
Large shared cache
Within a processor, increase in performance proportional to square root of increase in complexity
If software can use multiple processors, doubling number of processors almost doubles performance
So, use two simpler processors on the chip rather than one more complex processor
With two processors, larger caches are justified
Power consumption of memory logic less than processing logic

66. x86 Evolution (1) 8080 first general purpose microprocessor
8 bit data path
Used in first personal computer – Altair
8086 – 5MHz – 29,000 transistors
much more powerful
16 bit
instruction cache, prefetch few instructions
8088 (8 bit external bus) used in first IBM PC
80286
16 Mbyte memory addressable
up from 1Mb
80386
32 bit
Support for multitasking
80486
sophisticated powerful cache and instruction pipelining
built in maths co-processor

67. x86 Evolution (2) Pentium Pentium Pro Pentium II Pentium III
Superscalar
Multiple instructions executed in parallel
Pentium Pro
Increased superscalar organization
Aggressive register renaming
branch prediction
data flow analysis
speculative execution
Pentium II
MMX technology
graphics, video & audio processing
Pentium III
Additional floating point instructions for 3D graphics

68. x86 Evolution (3) Pentium 4 Core Core 2
Note Arabic rather than Roman numerals
Further floating point and multimedia enhancements
Core
First x86 with dual core
Core 2
64 bit architecture
Core 2 Quad – 3GHz – 820 million transistors
Four processors on chip
x86 architecture dominant outside embedded systems
Organization and technology changed dramatically
Instruction set architecture evolved with backwards compatibility
~1 instruction per month added
500 instructions available
See Intel web pages for detailed information on processors