1. ECE 333 Linear Electronics
Spring 2017
Qiliang Li

2. Voltage Amplifier

4. Chapter 3 Semiconductors

5. §3.2 Doped Semiconductors: N-type

6. §3.2 Doped Semiconductors: P-type

7. §3.2 Doped Semiconductors
Example:

8. §3.3 Current Flow in Semiconductors
Drift current
Hole velocity
Electron velocity
conductivity

9. §3.3 Current Flow in Semiconductors
Example
For intrinsic Si:
For P-doped Si:

10. §3.3 Current Flow in Semiconductors
Diffusion current
Same for electron injection
Dp and Dn: diffusion constant or diffusivity

11. §3.3 Current Flow in Semiconductors
Example
Einstein relationship

12. §3.4 The pn Junction

13. ID is due to majority carrier diffusion
ID is due to majority carrier diffusion. IS is due to thermally generated minority carriers, which are driven by electric field  drift current.
Figure 3.9 (a) The pn junction with no applied voltage (open- circuited terminals). (b) The potential distribution along an axis perpendicular to the junction.

14. §3.4 Physical structure of pn Junction
Donor ions
N-type
P-type V I
Reverse bias
Forward bias
diode
symbol
PN junction is present in perhaps every semiconductor device.

16. Built-in Voltage
N-region
P-region

18. Figure 3. 10 (a) A pn junction with the terminals open-circuited
Figure 3.10 (a) A pn junction with the terminals open-circuited. (b) Carrier concentrations; note that NA > ND. (c) The charge stored in both sides of the depletion region; QJ = |Q+| = |Q−|. (d) The built-in voltage V0.

19. Poisson’s Equation Gauss’s Law: s: permittivity (~12o for Si) rD x r E ( ) + a e A
s: permittivity (~12o for Si)
: charge density (C/cm3)
Poisson’s equation

20. §3.4 Physical structure of pn Junction
Built-in voltage
Depletion width
Stored charge

21. * §3.5 The pn Junction with an Applied Voltage

22. * §3.5 The pn Junction with an Applied Voltage
Reverse bias:
 effective barrier increase (VR + Vo)
Depletion width
Charge stored in Junction

23. * §3.5 The pn Junction with an Applied Voltage
Current-voltage (forward bias)

24. §3.5 The pn Junction with an Applied Voltage
Current is diffusion current - drift current
At the edge x = xn, minority is hole carrier

25. §3.5 The pn Junction with an Applied Voltage
When x > xn, the excess hole concentration decay exponentially: 
Current is:

26. §3.5 The pn Junction with an Applied Voltage
So, Jp(x) is highest at x = xn
Similarly, electron current at x = - xp is
Note: although the current Jp(xn) and Jn(-xp) do not change in the depletion region.

27. §3.5 The pn Junction with an Applied Voltage
The total current include both contribution of electron and hole: Or with 

28. §3.5 The pn Junction with an Applied Voltage
Reverse breakdown:
Junction breakdown
Zener effect: VZ < 5 V
Avalanche effect:
VZ > 7 V

29. Two Charge-storage mechanisms in pn Junction
Depletion or Junction capacitance
- associtated with charge stored in the depletion region
Diffusion Capacitance
- associated with the minority-carrier charge stored in the n and p materials as a result of the concentration profiles established by carrier injection

30. 3.6.1 Depletion or Junction Capacitance
The charge stored in either side of the depletion region
𝑄 𝐽 =𝐴 2 𝜖 𝑠 𝑞 𝑁 𝐴 𝑁 𝐷 𝑁 𝐴 + 𝑁 𝐷 ( 𝑉 0 + 𝑉 𝑅 )
We can write it as
𝑄 𝐽 =𝛼 ( 𝑉 0 + 𝑉 𝑅 )
𝛼=𝐴 2 𝜖 𝑠 𝑞 𝑁 𝐴 𝑁 𝐷 𝑁 𝐴 + 𝑁 𝐷
where

31. or graded junction (m=1/3)
Junction Capacitance CJ relates the change in charge QJ to a change in the voltage VR
That is:
𝐶 𝐽 = 𝑑 𝑄 𝐽 𝑑 𝑉 𝑅 | 𝑉 𝑅 = 𝑉 𝑄
because
𝑄 𝐽 =𝛼 ( 𝑉 0 + 𝑉 𝑅 )
𝐶 𝐽 = 𝛼 2 ( 𝑉 0 + 𝑉 𝑅 )
𝐶 𝐽0 = 𝛼 2 𝑉 0
If let
𝐶 𝐽 = 𝐶 𝐽0 (1+ 𝑉 𝑅 𝑉 0 )
For abrupt (m=1/2)
or graded junction (m=1/3)
𝐶 𝐽 = 𝐶 𝐽0 (1+ 𝑉 𝑅 𝑉 0 ) 𝑚

32. Another approach to determine CJ
Use the parallel plate capacitor equation:
𝐶 𝐽 = 𝜖 𝑠 𝐴 𝑊
where A is area and W is depletion width
Remember Eq. (3.31)
W= 2 𝜖 𝑠 𝑞 𝑁 𝐴 + 𝑁 𝐷 𝑁 𝐴 𝑁 𝐷 ( 𝑉 0 + 𝑉 𝑅 )
𝐶 𝐽 =𝐴 𝜖 𝑠 𝑞 2 𝑁 𝐴 𝑁 𝐷 𝑁 𝐴 + 𝑁 𝐷 1 ( 𝑉 0 + 𝑉 𝑅 )

33. 3.6.2 Diffusion Capacitance
It is due to the minority-carrier charges stored in p and n bulk regions (outside the depletion region).
𝑄 𝑝 =𝐴𝑞×𝑠ℎ𝑎𝑑𝑒𝑑 𝑎𝑟𝑒𝑎 𝑢𝑛𝑑𝑒𝑟 𝑡ℎ𝑒 𝑝 𝑛 𝑥 𝑐𝑢𝑟𝑣𝑒𝑠=𝐴𝑞 𝑝 𝑛 𝑥 𝑛 − 𝑝 𝑛0

34. 3.6.2 Diffusion Capacitance
From Eq. (3.33) 𝑝 𝑛( 𝑥 𝑛 ) = 𝑝 𝑛0 𝑒 𝑉/ 𝑉 𝑇
And Eq. (3.37) 𝐽 𝑝( 𝑥 𝑛 ) = 𝑞( 𝐷 𝑝 𝐿 𝑝 )𝑝 𝑛0 (𝑒 𝑉/ 𝑉 𝑇 −1) so
The minority carrier life time
𝑄 𝑝 = 𝐿 𝑝 2 𝐷 𝑝 𝐼 𝑝
𝜏 𝑝 = 𝐿 𝑝 2 𝐷 𝑝
𝜏 𝑛 = 𝐿 𝑛 2 𝐷 𝑛
𝑄= 𝜏 𝑝 𝐼 𝑝 + 𝜏 𝑛 𝐼 𝑛 = 𝜏 𝑇 𝐼
τp if NA >> ND
τT is the mean transit time =
τn if ND >> NA

35. 3.6.2 Diffusion Capacitance
For high-speed or high-f operation, Cd should be small. So τT should be small  small diffusion length and large diffusivity (or mobility)
𝑄= 𝜏 𝑝 𝐼 𝑝 + 𝜏 𝑛 𝐼 𝑛 = 𝜏 𝑇 𝐼= 𝜏 𝑇 𝐼 𝑠 𝑒 𝑉/ 𝑉 𝑇
𝐶 𝑑 = 𝑑𝑄 𝑑𝑉 = 𝜏 𝑇 𝑉 𝑇 𝐼

36. Summary of Chapter 3 Semiconductors
Carrier concentration in intrinsic Si
Diffusion current and drift current density in Si
Resistivity and conductivity
Mobility vs. diffusivity
Carrier concentration in doped Si
Junction built-in voltage
Depletion width and Charge
Junction current
Minority charge storage
Capacitance
Table 3.1 page